SPSB100 datasheet(54/213 Pages) STMICROELECTRONICS

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•

An echo signal of the watchdog block enable signal: WD_ENA_ECHO live bit in the status register.

•

An echo error detection mechanism: WD_ENA_ECHO_ERROR status bit is set if the device detects that

the watchdog block is turned OFF while the device is not in SW-DEBUG mode, and an interrupt is sent to

IRQ pin, except if MASK_WD_ENA_ECHO_ERROR_IRQ is set.

4.14

FCCU block monitoring

To detect an improper turn-OFF of the FCCU monitor feature, the device embeds:

•

An echo signal of the FCCU monitor block enable signal: FCCU_ENA_ECHO live bit in the status register.

•

An echo error detection mechanism: FCCU_ENA_ECHO_ERROR status bit is set if the device detects that

the FCCU monitor block is turned OFF in ACTIVE state, when FCCU_ENA has been set and an interrupt is

sent to IRQ pin, except if MASK_FCCU_ENA_ECHO_ERROR_IRQ is set.

4.15

Analog BIST

ABIST is performed on SPI request.

ABIST is not run on blocks that are turned OFF. The MCU shall ensure the proper turn ON of a block when its

ABIST is expected to be run.

ABIST covers latent fault detection of:

•

OV, UV, PG analog comparators.

•

Internal voltage and current supplies monitor.

•

Central thermal monitor.

•

BOOST and BYPASS VDS monitors.

ABIST must be run only in Active-Full power mode by MCU through the SPI. MCU shall write ABIST bit to request

its execution (only after SPI_PROTECT_ACCESS has been set).

After TABIST, ABIST is finished, the status bit ABIST_COMPLETE is set and an interrupt is sent to IRQ pin.

ABIST_ERROR is set in case an error is detected.

For boost VDSM monitoring, to avoid false ABIST error, a status bit ABIST_BOOST_IGNORED will be set at 1 if

ABIST request is done during boost PWM activity.

4.16

Logic BIST

The SPSB100 integrates two logic BIST:

•

LBIST1 is performed at INIT state only.

•

LBIST2 is performed at INIT state and on SPI request.

Figure 31. Logic BIST

SPI

core

SPI regs

Redundant Safety

Critical SPI regs

FSM

Redundant

FSM

comparator

Legend :

•

Not covered by LBIST

•

Covered by LBIST1 ran at INIT state of FSM only

•

Covered by LBIST2 ran at INIT state of FSM and on MCU request

SPI

I/F

SPSB100

Protection, diagnosis and monitoring signals

DS14640 - Rev 2

page 54/213

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