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SPSB100 Scheda tecnica(PDF) 68 Page - STMicroelectronics |
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SPSB100 Scheda tecnica(HTML) 68 Page - STMicroelectronics |
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68 / 213 page ![]() Table 21. Safety requirement list while MCU is in Stand-By mode ID Description Safe state SR1 While MCU is in Stand-By mode the PMIC shall monitor the supply output voltages for the MCU and force a reset of the MCU in case of a voltage error. Output regulators are stopped, NRESET and NFSO pins are asserted. SPSB100 tries to power-up again, if the fault is confirmed for 3 successive power-up then output regulators are stopped, NRESET and NFSO pins are asserted and SPSB100 reaches DEEP-SLEEP state. SR2 The PMIC shall monitor the local temperature of each supply regulator and force a shut-down of the supply regulator in case of temperature runaway. Output regulators are stopped, NRESET and NFSO pins are asserted. SPSB100 waits that the regulator temperature decreases then tries to power-up again, if the fault is confirmed for 3 successive power-up then output regulators are stopped, NRESET and NFSO pins are asserted and SPSB100 reaches DEEP-SLEEP state. SR3 The PMIC shall monitor the power dissipation of BOOST external transistors and avoid their destruction in case of runaway. BOOST is stopped, error is signaled to MCU, SPSB100 state is unchanged. Note: More details about functional safety can be found in the device safety manual, provided only upon customers request. 6.2 Safety mechanisms Safety mechanisms implemented in SPSB100 are described in the Section 4: Protection, diagnosis and monitoring signals, more details about functional safety can be found in the device safety manual, provided only upon customers request. SPSB100 Functional safety concept DS14640 - Rev 2 page 68/213 |
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