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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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SPSB100 Scheda tecnica(PDF) 58 Page - STMicroelectronics |
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SPSB100 Scheda tecnica(HTML) 58 Page - STMicroelectronics |
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58 / 213 page  Figure 33. SPI signal description The communication frame starts with the falling edge of the CSN (Communication Start). CLK has to be low. The SDI data is then latched at all following rising CLK edges into the internal shift registers. After Communication Start the SDO leaves high impedance state and present the MSB of the data shifted out to the SDO. At all following falling CLK edges data is shifted out through the internal shift registers to SDO. The communication frame is finished with the rising edge of CSN. If a valid communication took place, the requested operation according to the operating code is performed. 5.2.2 Communication protocol 5.2.2.1 SDI frame The devices data-in frame consists of 32 bits (OpCode (2 bits) + address (6 bits) + data (20 bits) + CRC (4 bits)). The first two received bits (MSB, MSB-1) contain the operation code which indicates the instruction to be performed. The following 6 bits (MSB-2 to MSB-7) represent the address on which the operation is performed. The subsequent bytes contain the payload. Figure 34. SDI frame OC1 OC0 A5 A4 A3 A2 A1 A0 15 14 13 12 11 10 9 7 6 5 4 3 2 1 0 OPCODE ADDRESS DATA Byte 2 DATA Byte 1 8 MSB LSB time time time 23 22 21 20 19 18 17 DATA Byte 3 16 time CRC CRC CRC CRC SPSB100 Serial peripheral interface (SPI) DS14640 - Rev 2 page 58/213 |
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