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SSM3582ACPZ-R7 Scheda tecnica(PDF) 1 Page - Analog Devices |
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SSM3582ACPZ-R7 Scheda tecnica(HTML) 1 Page - Analog Devices |
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1 / 58 page  2×, 31.76 W, Digital Input, Filterless Stereo Class D Audio Amplifier Data Sheet SSM3582A Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2019–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Digital input stereo, high efficiency Class-D amplifier Operates from a single 4.5 V to 16.5 V supply State-of-the-art, proprietary, filterless Σ-Δ modulation 106.5 dB SNR at PO = 8.1 W, RL = 8 Ω, AV = 19 dB, PVDD = 12 V, A weighted 0.004% THD + N at 5 W into 8 Ω 38.5 µV rms output voltage noise, f = 20 Hz to 20 kHz, A weighted, PVDD = 16 V, 8 Ω Pop and clickless on and off sequence 2× 14.67 W output at 12 V supply to 4 Ω loads at <1% THD + N 2× 14.4 W output at 16 V supply to 8 Ω loads at <1% THD + N Mono mode for increased maximum output power 1× 49.69 W output at 16 V supply to 2 Ω loads at <1% THD + N Support for low impedance loads As low as 3 Ω/5 μH in stereo mode As low as 2 Ω/5 μH in mono mode High power efficiency 93.8% efficiency into an 8 Ω load 90.6% efficiency into a 4 Ω load 12.34 mA quiescent current with single 12 V PVDD supply Single-supply operation with internal LDOs or option to use an external 5 V and 1.8 V supply for lowest power consumption I2C control and hardware modes with up to 16 pin-selectable slots/addresses Supported sample rates from 8 kHz to 192 kHz with 24-bit resolution Multiple PCM audio serial data formats TDM slave with support for up to 16 devices on a single bus I2S or left justified slave Adjustable full-scale output tailored for many PVDD sources 2- and 3-cell Li-Ion batteries Digital volume control with selectable smooth ramp Automatic power-down function Supply monitoring automatic gain control (AGC) function reduces system brownout Standalone operational mode without I2C Temperature sensor with 1°C step readout via I2C Short-circuit, undervoltage, and thermal protection Thermal early warning Power-on reset PVDD sensing ADC 40-lead, 6 mm × 6 mm LFCSP with thermal pad APPLICATIONS Mobile computing All in one computers Portable electronics Wireless speakers Televisions FUNCTIONAL BLOCK DIAGRAM OUTL+ OUTL– SDA SCL ADDR0 ADDR1 PVDD DVDD AGND BSTL+ BSTL– PGND DAC PVDD ADC TEMPERATURE SENSOR DVDD 1.8V LDO VOLUME BATTERY AGC SSM3582A THREE-LEVEL Σ-Δ MODULATOR FULL BRIDGE POWER STAGE I2C CONTROL I2S TDM INTERFACE BCLK FSYNC SDATA OUTR+ OUTR– BSTR+ BSTR– DAC THREE-LEVEL Σ-Δ MODULATOR FULL BRIDGE POWER STAGE DVDD_EN AVDD AVDD 5V LDO AVDD_EN Figure 1. |
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