R5F566TFCDFB datasheet(109/151 Pages) RENESAS

109 / 151 page

R01DS0315EJ0130 Rev.1.30

Page 109 of 151

Oct 06, 2023

RX66T Group

2. Electrical Characteristics

2.4.6.6

GPTW

Note 1. tPCcyc: PCLKC cycle

Note 2. tPBcyc: PCLKB cycle

Figure 2.41

GPTW Input Capture Input Timing

Figure 2.42

GPTW External Trigger Input Timing

Figure 2.43

GPTW Clock Input Timing

Table 2.35

GPTW Timing

Conditions: VCC = 2.7 to 5.5 V, VCC_USB = 2.7 to 5.5 V, AVCC0 = AVCC1 = AVCC2 = 3.0 to 5.5V,

VSS = VSS_USB = AVSS0 = AVSS1 = AVSS2 = 0 V, Ta = Topr,

ICLK = 8 to 160 MHz, PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, PCLKC = 8 to 160 MHz, BCLK = 8 to 60 MHz,

Output load conditions: VOH = 0.5 × VCC, VOL = 0.5 × VCC, C = 30 pF,

High-drive output is selected by the driving ability control register (other than for P53 to P55 and P60 to P65).

Item

Symbol

Min.

Max.

Unit*1, *2

Test

Conditions

GPTW

Input capture input pulse

width

Single-edge setting

tGTICW

1.5

—

tPCcyc

Figure 2.41

Both-edge setting

2.5

—

External trigger input pulse

width

Single-edge setting

tGTEW

1.5

—

tPBcyc

Figure 2.42

Both-edge setting

2.5

—

Timer clock pulse width

tGTCKWH

1.5

—

tPBcyc

Figure 2.43

tGTCKWL

Input capture

input

PCLKC

tGTICW

GTETRGn input

(n = A to D)

PCLKB

tGTEW

GTETRGn input

(n = A to D)

PCLKB

tGTCKWL

tGTCKWH

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