STA680 datasheet(32/43 Pages) STMICROELECTRONICS

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Digital I/O and memory interfaces

STA680

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5.4.2

Flash serial peripheral interface (SPI2)

The Flash SPI is useful for storing boot code and other configuration parameters. The

minimum required capacity for this purpose is 1 Mbit.

The STA680 is SPI master only on the FLASH bus. No glue logic is necessary to connect an

external Flash to the HD Radio Decoder.

In the BGA package up to 4 chips selects are available. For pin description see Table 12.

5.4.3

SD/MMC serial peripheral interface (SPI3)

The SPI SD/MMC SPI allows to connect the STA680 to a Secure Digital Card or a

Multimedia Card for data storage purposes.

This interface can be configured to be master or slave and is available only in the BGA

Package. For pin description see Table 13.

5.4.4

I2C interfaces

The STA680 provides two I2C interfaces that can be used to communicate with the Host

Microcontroller. The first one may be used by the Host Micro in replacement of the SPI1 to

control the main function of the HD Radio Decoder. The second one is an auxiliary interface

and is available only in the LFBGA package option. For pin description see Table 14.

Table 12.

Flash SPI pin list

Pin name

Designation

Type

Drive

SPI2_MISO(1)

Slave only interface.

Flash SPI data master in/slave out

SPI2_MOSI(1)

Flash SPI data master out/slave in

4mA

SPI2_SCK

Flash SPI clock

4mA

SPI2_SS_N

Flash SPI active-low slave select 1

4mA

SPI2_SS1_N

Flash SPI active-low slave select 2 (2))

Only available in BGA package.

O4mA

SPI2_SS2_N

Flash SPI active-low slave select 3 (2)

O4mA

SPI2_SS3_N

Flash SPI active-low slave select 4 (2)

O4mA

Table 13.

SD/MMC SPI pin list

Pin name

Designation(1)

Only available in BGA package

Type

Drive

SPI3_MISO

SD/MMC SPI data master in/slave out

I/O

4mA

SPI3_MOSI

SD/MMC SPI data master out/slave in

I/O

4mA

SPI3_SCK

SD/MMC SPI clock

4mA

SPI3_SS_N

SD/MMC SPI active-low slave select 1

4mA

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