R8C datasheet(116/199 Pages) RENESAS

116 / 199 page

R8C/10 Group

Rev.1.20 Jan 27, 2006

page 106 of 180

REJ09B0019-0120

AD control register 0(1)

SymbolAddressAfter reset

ADCON000D616

00000XXX2

b7 b6 b5 b4 b3 b2 b1 b0

Analog input pin select

bit(2)

0 0 0 : AN0 is selected

0 0 1 : AN1 is selected

0 1 0 : AN2 is selected

0 1 1 : AN3 is selected

1 0 0 : AN4 is selected

1 0 1 : AN5 is selected

1 1 0 : AN6 is selected

1 1 1 : AN7 is selected

CH0

Bit symbol

Bit name

Function

CH1

CH2

AD operation mode select

bit 0(2)

0 : One-shot mode

1 : Repeat mode

ADST

A/D conversion start flag

0 : A/D conversion disabled

1 : A/D conversion started

Frequency select bit 0(3)

0 : fAD/4 is selected

1 : fAD/2 is selected

CKS0

AD control register 1(1)

Symbol

AddressAfter reset

ADCON100D716

0016

Bit nameFunction

Bit symbol

b7 b6 b5 b4 b3 b2 b1 b0

b2 b1 b0

NOTES:

1. If the ADCON register is rewritten during A/D conversion, the conversion result is indeterminate.

2. When changing A/D operation mode, set analog input pin again.

3. This bit is valid when the CKS1 bit in the ADCON1 register is set to “0”.

NOTES:

1. If the ADCON1 register is rewritten during A/D conversion, the conversion result is indeterminate.

2. In repeat mode, the BITS bit must be set to “0” (8-bit mode).

3. The

φAD frequency must be 10 MHz or less.

4. If the VCUT bit is reset from “0” (Vref unconnected) to “1” (Vref connected), wait for 1 µs or more before starting A/D

conversion.

BITS

8/10-bit mode select

bit(2)

0 : 8-bit mode

1 : 10-bit mode

VCUT

Vref connect bit(4)

0 : Vref not connected

1 : Vref connected

Frequency select

bit 1(3)

CKS1

Set to “0”

Reserved bit

(b4)

Set to “0”

Reserved bit

(b5)

Set to “0”

Reserved bit

(b2-b0)

Set to “0”

Reserved bit

(b6-b7)

0 : CKS0 bit in ADCON0 register is valid

1 : fAD is selected

Figure 14.2 ADCON0 Register and ADCON1 Register

14. A/D Converter

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