R8C datasheet(155/199 Pages) RENESAS

155 / 199 page

R8C/10 Group

Rev.1.20 Jan 27, 2006

page 145 of 180

REJ09B0019-0120

Figure 17.3 shows the FMR0 register. Figure 17.4 shows the FMR1 and FMR4 registers.

• FMR00 Bit

This bit indicates the operating status of the flash memory. The bit is “0” during programming, eras-

ing, or erase-suspend mode; otherwise, the bit is “1”.

• FMR01 Bit

The microcomputer is made ready to accept commands by setting the FMR01 bit to “1” (CPU rewrite

mode).

• FMR02 Bit

The Block1 and Block0 do not accept the Program and Block Erase commands if the FMR02 bit is

set to “0” (rewrite disabled).

• FMSTP Bit

This bit is provided for initializing the flash memory control circuits, as well as for reducing the amount

of current consumed in the flash memory. The flash memory is disabled against access by setting

the FMSTP bit to “1”. Therefore, the FMSTP bit must be written to by a program in other than the

flash memory.

In the following cases, set the FMSTP bit to “1”:

• When flash memory access resulted in an error while erasing or programming in EW0 mode

(FMR00 bit not reset to “1” (ready))

• When entering on-chip oscillator mode (main clock stop).

Figure 17.6 shows a flow chart to be followed before and after entering on-chip oscillator mode (main

clock stop).

Note that when going to stop or wait mode while the CPU rewrite mode is disabled, the FMR0

and is turned back on again after returning from stop or wait mode.

• FMR06 Bit

This is a read-only bit indicating the status of auto program operation. The bit is set to “1” when a

program error occurs; otherwise, it is cleared to “0”. For details, refer to the description of the full

status check.

• FMR07 Bit

This is a read-only bit indicating the status of auto erase operation. The bit is set to “1” when an erase

error occurs; otherwise, it is set to “0”. For details, refer to the description of "17.4.5 Full status

check".

• FMR11 Bit

Setting this bit to “1” (EW1 mode) places the microcomputer in EW1 mode.

• FMR40 bit

The erase-suspend function is enabled by setting the FMR40 bit to “1” (valid).

• FMR41 bit

In EW0 mode, the flash module goes to erase-suspend mode when the FMR41 bit is set to “1”. In

EW1 mode, the FMR41 bit is automatically set to “1” (erase-suspend requested) when an enabled

interrupt occurred, and then the flash module goes to erase-suspend mode.

The auto-erase operation restarts when the FMR41 bit is set to “0” (erase restart).

• FMR46 bit

The FMR46 bit is set to “0”(disables reading) during auto-erase execution and set to “1”(enables

reading) during erase-suspend mode. Do not access to the flash memory when this bit is set to “0”.

17.4 CPU Rewrite Mode

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