M32CSLASH86 datasheet(74/505 Pages) RENESAS

74 / 505 page

Page 51

7. Processor Mode

)

(

0 0 : Multiplexed bus is not used

0 1 : Access the CS2 area using the bus

0 1 : Access the CS1 area using the bus

1 1 : Access all CS areas using the bus(5)

NOTES:

1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1"(write enable).

2. The PM01 and PM00 bits maintain values set before reset, even after software reset or watchdog

timer reset has performed.

3. Set the PM01 and PM00 bits to "012" or "112" separately. Rewrite other bits before rewriting the

PM01 and PM00 bits.

4. The PM04 and PM05 bits are available in memory expansion mode or microprocessor mode.

• Set the PM05 and PM04 bits to "002" in mode 0.

• Do not set the PM05 and PM04 bits to "012" in mode 2.

5. The PM05 and PM04 bits cannot be set to "112" in microprocessor mode since the microcomputer

starts up with the separate bus after reset.

When the PM05 and PM04 bits are set to "112" in memory expansion mode, the microcomputer can

access each 64-Kbyte chip-select-assigned address space. The multiplexed bus is not available in

mode 0. The microcomputer accesses the CS0 to CS2 in mode 1, CS0 and CS1 in mode 2 and

CS0 to CS3 in mode 3.

6. No BCLK is output in single-chip mode even if the PM07 bit is set to "0". When a clock output is

terminated in microprocessor mode or memory expansion mode, set the PM07 bit to "1" and the

CM01 and CM00 bits in the CM0 register to "002" (I/O port P53). P53 outputs "L".

7. When the PM07 bit is set to "0" (BCLK output), set the CM01 and CM00 bits to "002".

8. M32C/86T cannot be used in memory expansion mode and microprocessor mode.

Symbol

Address

After Reset

PM0

000416

1000 00002 (CNVss = "L")

0000 00112 (CNVss = "H")

Processor Mode Register 0(1)

b1 b0

b5 b4

0: RD / BHE / WR

1: RD / WRH / WRL

PM00

PM01

PM02

PM03

Software Reset Bit

R/W Mode Select Bit

PM04

PM05

(b6)

0 0: Single-chip mode

0 1: Memory expansion mode(8)

1 0: Do not set to this value

1 1: Microprocessor mode(8)

Set to "0"

PM07

BCLK Output

Disable Bit(6)

Reserved Bit

0 : BCLK is output(7)

1 : BCLK is not output

The CM01 and CM00 bits in the

CM0 register determine pin functions

The microcomputer is reset when

this bit is set to "1". When read, its

content is "0".

Bit Name

Function

Bit

Symbol

Processor Mode Bit(2, 3)

Multiplexed Bus Space

Select Bit(4)

Figure 7.1 PM0 Register

M32C/86 Scheda tecnica(PDF) 74 Page - Renesas Technology Corp

M32C/86 Scheda tecnica(HTML) 74 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL