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3819 Scheda tecnica(PDF) 46 Page - Renesas Technology Corp

Il numero della parte 3819
Spiegazioni elettronici  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  218 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

3819 Scheda tecnica(HTML) 46 Page - Renesas Technology Corp

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32
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 24 A-D converter block diagram
D-A CONVERTER
The 3819 group has internal D-A converter with 8-bit resolutions !
1 channel.
D-A conversion is performed by setting the value in the D-A con-
version register. The result of D-A conversion is output from the
DA pin by setting the DA output enable bit to “1” . At this time, the
corresponding bit (PB2/DA) of the port PB direction register should
be set to “0” (input status).
The output analog voltage V is determined with the value n
(n: decimal number) in the D-A conversion register as follows:
V=VREF ! n/256 (n=0 to 255)
VVREF: the reference voltage
At reset, the D-A conversion register is cleared to “0016”, the DA
output enable bits are cleared to “0”, and the PB2/DA pin goes to
high impedance state. The D-A output does not build in a buffer, so
connect an external buffer when driving a low-impedance load.
Set VCC to 3.0 V or more when using the D-A converter.
Fig. 25 D-A converter block diagram
Fig. 26 Equivalent connection circuit of D-A converter
A-D control circuit
A-D conversion register
Resistor ladder
VREF
AVSS
Comparator
A-D conversion interrupt request
b7
b0
4
8
P70/AN0
(Address 002D16)
AD-DA control register
(address 002C16)
P71/AN1
P72/AN2
P73/AN3
P74/AN4
P75/AN5
P76/AN6
P77/AN7
P50/SIN2/AN8
P51/Sout2/AN9
P52/SCLK2 /AN10
P53/SRDY2/AN11
P54/SIN3/AN12
P55/SOUT3/AN13
P56/SCLK3 /AN14
P57/SRDY3/AN15
Data bus
PB2/DA
D-A conversion register (8)
R-2R resistor ladder
DA output enable bit
AVSS
VREF
"0"
"1"
MSB
"0"
"1"
R
2R
LSB
PB2/DA
D-A conversion
register
DA output enable bit
2R
2R
2R
2R
2R
2R
2R
R
R
RRRR
2R



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