AD9548SLASHPCBZ datasheet(96/112 Pages) AD

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AD9548

Rev. 0 | Page 96 of 112

Table 127. Incremental Phase Offset Control

Address

Bits

Bit Name

Description

0A0C

[7:3]

Unused

[2]

Reset phase offset

Resets the incremental phase offset to 0.

This is an autoclearing bit.

[1]

Decr phase offset

Decrements the incremental phase offset by the amount specified in the incremental

phase lock offset step size register (Register 0314 to Register 0315).

This is an autoclearing bit.

[0]

Incr phase offset

Increments the incremental phase offset by the amount specified in the incremental

phase lock offset step size register (Register 0314 to Register 0315).

This is an autoclearing bit.

Table 128. Reference Profile Selection State Machine Startup1

Address

Bits

Bit Name

Description

0A0D

[7]

Detect DD

Setting this bit starts the profile selection state machine for Input Reference DD.

[6]

Detect D

Setting this bit starts the profile selection state machine for Input Reference D.

[5]

Detect CC

Setting this bit starts the profile selection state machine for Input Reference CC.

[4]

Detect C

Setting this bit starts the profile selection state machine for Input Reference C.

[3]

Detect BB

Setting this bit starts the profile selection state machine for Input Reference BB.

[2]

Detect B

Setting this bit starts the profile selection state machine for Input Reference B.

[1]

Detect AA

Setting this bit starts the profile selection state machine for Input Reference AA.

[0]

Detect A

Setting this bit starts the profile selection state machine for Input Reference A.

1 All bits in this register are autoclearing.

Table 129. Reference Validation Override Controls1

Address

Bits

Bit Name

Description

0A0E

[7]

Force Timeout DD

Setting this bit emulates a timeout of the validation timer for Reference DD.

This is an autoclearing bit.

[6]

Force Timeout D

Setting this bit emulates a timeout of the validation timer for Reference D.

This is an autoclearing bit.

[5]

Force Timeout CC

Setting this bit emulates a timeout of the validation timer for Reference CC.

This is an autoclearing bit.

[4]

Force Timeout C

Setting this bit emulates a timeout of the validation timer for Reference C.

This is an autoclearing bit.

[3]

Force Timeout BB

Setting this bit emulates a timeout of the validation timer for Reference BB.

This is an autoclearing bit.

[2]

Force Timeout B

Setting this bit emulates a timeout of the validation timer for Reference B.

This is an autoclearing bit.

[1]

Force Timeout AA

Setting this bit emulates a timeout of the validation timer for Reference AA.

This is an autoclearing bit.

[0]

Force Timeout A

Setting this bit emulates a timeout of the validation timer for Reference A.

This is an autoclearing bit.

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