ATmega162 datasheet(48/324 Pages) ATMEL

48 / 324 page

2513K–AVR–07/09

ATmega162/V

Figure 21. Reset Logic

Note:

1. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling)

Power-on Reset

A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level

is defined in Table 18. The POR is activated whenever V

CC is below the detection level. The

POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply

voltage.

A Power-on Reset (POR) circuit ensures that the device is Reset from Power-on. Reaching the

Power-on Reset threshold voltage invokes the delay counter, which determines how long the

device is kept in RESET after V

CC rise. The RESET signal is activated again, without any delay,

when V

CC decreases below the detection level.

Table 18. Reset Characteristics

Symbol

Parameter

Condition

Min.

Typ.

Max.

Units

VPOT

Power-on Reset

Threshold Voltage (rising)

TA = -40 - 85°C0.7

1.0

1.4

Power-on Reset

Threshold Voltage

(falling)(1)

A = -40 - 85°C0.6

0.9

1.3

VRST

RESET Pin Threshold

Voltage

VCC = 3V

0.1 VCC

0.9 VCC

tRST

Minimum pulse width on

RESET Pin

CC = 3V

2.5

µs

MCU Control and Status

BODLEVEL [ 2..0]

Delay Counters

CKSEL[3:0]

TIMEOUT

DATA BUS

Clock

Generator

SPIKE

FILTER

Pull-up Resistor

JTAG Reset

Watchdog

Oscillator

SUT[1:0]

Watchdog

Timer

VCC

RESET

Reset Circuit

Brown-out

Reset Circuit

Power-on

Reset Circuit

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