PCF8533USLASH2SLASHF2 datasheet(4/45 Pages) NXP

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PCF8533_4

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Product data sheet

Rev. 04 — 5 March 2010

4 of 45

NXP Semiconductors

PCF8533

Universal LCD driver for low multiplex rates

Functional description

The PCF8533 is a versatile peripheral device designed to interface any microprocessor or

microcontroller to a wide variety of LCDs. It can directly drive any static or multiplexed

LCD containing up to four backplanes and up to 80 segments.

The display configurations possible with the PCF8533 depend on the number of active

backplane outputs required. A selection of display configurations is given in Table 4; all of

these configurations can be implemented in the typical system shown in Figure 3.

The host microprocessor or microcontroller maintains the 2-line I2C-bus communication

channel with the PCF8533.

Biasing voltages for the multiplexed LCD waveforms are generated internally, removing

the need for an external bias generator. The internal oscillator is selected by connecting

pin OSC to VSS. The only other connections required to complete the system are the

power supplies (pins VDD, VSS and VLCD) and the LCD panel selected for the application.

7.1 Power-on reset

At power-on the PCF8533 resets to the following starting conditions:

1. All backplane outputs are set to VLCD.

2. All segment outputs are set to VLCD.

3. The selected drive mode is: 1:4 multiplex with 1

⁄

3 bias.

4. Blinking is switched off.

5. Input and output bank selectors are reset.

Table 4.

Selection of display configurations

Number of

8-segment alphanumeric

15-segment alphanumeric

Dot matrix

Backplanes

Elements

Digits

Indicator symbols

Characters

Indicator symbols

320

320 (4

× 80)

240

240 (3

× 80)

160

160 (2

× 80)

180

80 (1

× 80)

Fig 3.

Typical system configuration

HOST

MICRO-

PROCESSOR/

MICRO-

CONTROLLER

2Cb

SDA

SDAACK

SCL

OSC

80 segment drives

4 backplanes

LCD PANEL

(up to 320

elements)

PCF8533

SA0

VDD

VSS

VDD

VLCD

mgl744

≤

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