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PCF8533U/2/F2 Scheda tecnica(PDF) 5 Page - NXP Semiconductors |
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PCF8533U/2/F2 Scheda tecnica(HTML) 5 Page - NXP Semiconductors |
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5 / 45 page ![]() PCF8533_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 5 March 2010 5 of 45 NXP Semiconductors PCF8533 Universal LCD driver for low multiplex rates 6. The I2C-bus interface is initialized. 7. The data pointer and the subaddress counter are cleared (set to logic 0). 8. The display is disabled. Remark: Do not transfer data on the I2C-bus for at least 1 ms after a power-on to allow the reset action to complete. 7.2 LCD bias generator Fractional LCD biasing voltages are obtained from an internal voltage divider of three series resistors connected between pins VLCD and VSS. The center resistor is bypassed by switch if the 1 ⁄ 2 bias voltage level for the 1:2 multiplex drive mode configuration is selected. 7.3 LCD voltage selector The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the selected LCD drive configuration. The operation of the voltage selector is controlled by the mode-set command (see Table 10) from the command decoder. The biasing configurations that apply to the preferred modes of operation, together with the biasing characteristics as functions of VLCD and the resulting discrimination ratios (D) are given in Table 5. A practical value for VLCD is determined by equating Voff(RMS) with a defined LCD threshold voltage (Vth), typically when the LCD exhibits approximately 10 % contrast. In the static drive mode a suitable choice is VLCD >3Vth. Multiplex drive modes of 1:3 and 1:4 with 1 ⁄ 2 bias are possible but the discrimination and hence the contrast ratios are smaller. Bias is calculated by , where the values for a are a = 1 for 1 ⁄ 2 bias a = 2 for 1 ⁄ 3 bias The RMS on-state voltage (Von(RMS)) for the LCD is calculated with Equation 1: (1) where the values for n are Table 5. Biasing characteristics LCD drive mode Number of: LCD bias configuration Backplanes Levels static 1 2 static 0 1 ∞ 1:2 multiplex 2 3 1 ⁄ 2 0.354 0.791 2.236 1:2 multiplex 2 4 1 ⁄ 3 0.333 0.745 2.236 1:3 multiplex 3 4 1 ⁄ 3 0.333 0.638 1.915 1:4 multiplex 4 4 1 ⁄ 3 0.333 0.577 1.732 V off RMS () V LCD ------------------------- V on RMS () V LCD ------------------------ D V on RMS () V off RMS () ------------------------- = 1 1a + ------------- V on RMS () a2 2a n ++ n 1a + () 2 × ------------------------------ V LCD = |
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