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PIC12F629-I/SN Scheda tecnica(PDF) 52 Page - Microchip Technology |
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PIC12F629-I/SN Scheda tecnica(HTML) 52 Page - Microchip Technology |
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52 / 136 page ![]() PIC12F629/675 DS41190G-page 52 2010 Microchip Technology Inc. 8.7 Data EEPROM Operation During Code Protect Data memory can be code protected by programming the CPD bit to ‘0’. When the data memory is code protected, the CPU is able to read and write data to the data EEPROM. It is recommended to code protect the program memory when code protecting data memory. This prevents anyone from programming zeroes over the existing code (which will execute as NOPs) to reach an added routine, programmed in unused program memory, which outputs the contents of data memory. Programming unused locations to ‘0’ will also help prevent data memory code protection from becoming breached. TABLE 8-1: REGISTERS/BITS ASSOCIATED WITH DATA EEPROM Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOD Value on all other Resets 0Ch PIR1 EEIF ADIF — — CMIF — — TMR1IF 00-- 0--0 00-- 0--0 9Ah EEDATA EEPROM Data Register 0000 0000 0000 0000 9Bh EEADR — EEPROM Address Register -000 0000 -000 0000 9Ch EECON1 — — — — WRERR WREN WR RD ---- x000 ---- q000 9Dh EECON2(1) EEPROM Control Register 2 ---- ---- ---- ---- Legend: x = unknown, u = unchanged, - = unimplemented read as ‘ 0’, q = value depends upon condition. Shaded cells are not used by data EEPROM module. Note 1: EECON2 is not a physical register. |
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