 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
MPC8378E Scheda tecnica(PDF) 41 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8378E Scheda tecnica(HTML) 41 Page - Freescale Semiconductor, Inc |
|
|
41 / 127 page  MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4 Freescale Semiconductor 41 Local Bus 10.2 Local Bus AC Electrical Specifications Table 44 describes the general timing parameters of the local bus interface of the device when in PLL enable mode. Table 42. Local Bus DC Electrical Characteristics (LBVDD =2.5 V) At recommended operating conditions with LBVDD = 2.5 V. Parameter Conditions Symbol Min Max Unit Supply voltage 2.5 V — LBVDD 2.37 2.73 V Output high voltage IOH = –1.0 mA LBVDD = Min VOH 2.00 — V Output low voltage IOL = 1.0 mA LBVDD = Min VOL —0.40 V Input high voltage — LBVDD = Min VIH 1.7 LBVDD + 0.3 V Input low voltage — LBVDD = Min VIL –0.3 0.70 V Input high current VIN 1 = LBV DD IIH —20 μA Input low current VIN 1 = GND IIL –20 — μA Table 43. Local Bus DC Electrical Characteristics (LBVDD =1.8 V) At recommended operating conditions with LBVDD = 1.8 V. Parameter Conditions Symbol Min Max Unit Supply voltage 1.8 V — LBVDD 1.71 1.89 V Output high voltage IOH = –1.0 mA LBVDD = Min VOH LBVDD – 0.45 — V Output low voltage IOL = 1.0 mA LBVDD = Min VOL —0.45 V Input high voltage — LBVDD = Min VIH 0.65 × LBV DD LBVDD + 0.3 V Input low voltage — LBVDD = Min VIL –0.3 0.35 × LBV DD V Input high current VIN 1 = LBV DD IIH —10 μA Input low current VIN 1 = GND IIL –10 — μA Table 44. Local Bus General Timing Parameters—PLL Enable Mode Parameter Symbol1 Min Max Unit Notes Local bus cycle time tLBK 7.5 15 ns 2 Input setup to local bus clock (except LUPWAIT/LGTA)tLBIVKH 1.5 — ns 3, 4 Input hold from local bus clock tLBIXKH 1.0 — ns 3, 4 LUPWAIT/LGTA input setup to local bus clock tLBIVKH1 1.5 — ns 3, 4 LALE output fall to LAD output transition (LATCH hold time) tLBOTOT1 1.5 — ns 5 LALE output fall to LAD output transition (LATCH hold time) tLBOTOT2 3— ns 6 LALE output fall to LAD output transition (LATCH hold time) tLBOTOT3 2.5 — ns 7 Local bus clock to LALE rise tLBKHLR —4.5 ns — Local bus clock to output valid (except LALE) tLBKHOV —4.5 ns 3 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
