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STPMC1 Scheda tecnica(PDF) 55 Page - STMicroelectronics

Il numero della parte STPMC1
Spiegazioni elettronici  Programmable poly-phase energy calculator IC
PDF  77 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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STPMC1 Scheda tecnica(HTML) 55 Page - STMicroelectronics

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STPMC1
Theory of operation
Doc ID 15728 Rev 6
55/77
Each configuration bit can be written sending a byte command to STPMC1 through its SPI
interface. See paragraph
9.21 for details on SPI operation.
A system signal WE (see paragraph
9.20) is used in order to do the permanent write of
some OTP bit. There is also a special high voltage input pad VOTP, which delivers the power
level necessary for permanent write to OTP cell.
The STPMC1 can work either using the data stored in the OTP cells or the data from the
shadow latches. This is done through the RD system signal (see paragraph
9.20). If RD is
set, the CFG bits originates from corresponding OTP shadow latches otherwise, if RD is
cleared, the CFG bits originates from corresponding OTP antifuses. In this way it is possible
to test temporary configurators and calibrators before writing permanently on the device, for
example during meter production tests.
The very first CFG bit, called TSTD, disables any further OTP writing. After TSTD bit has
been set, the only commands accepted are the mode signal precharge (see paragraph
9.20) and the remote reset request (see paragraph 9.21.1), this implies that the test mode is
disabled and shadow latches cannot be used as source of configuration data anymore.
The following table represents a collection and function of all configuration bits in the device.
For multibit configurations the most significant bit address is bold.
Table 33.
Configuration bits map
Address
Name
N. of
bits
Description
IMPORTANT: The decimal value indicated in this column represents
the value of the configuration bits with MSB in bold.
7-BIT
Binary
DEC
0000000
0
TSTD
1
Test mode and OTP write disable:
- TSTD=0: enable test modes and system signals,
- TSTD=1: normal operation and no more writes to OTP or test modes
0000001
1
MDIV
1
Selection of measurement clock option:
- MDIV=0: f
MCLK = fXTAL1 * 2,
- MDIV=1: f
MCLK = fXTAL1
0000010
2
HSA
1
High speed analog clock selection:
- HSA=0: f
CLK = fXTAL1/4,
- HSA=1: f
CLK = fXTAL1/2
0000011
0000100
3
4
APL
2
Application type selection:
- APL=0: peripheral MOP, MON=ZCR, WatchDOG, LED=pulses (X),
- APL=1: peripheral MOP, MON=stepper(P), LED=pulses (X),
- APL=2: standalone MOP, MON=stepper(P), LED=pulses(P),
SCLNLC=no-load SDATD=tamper detected, SYN=neg act power
- APL=3: standalone, MOP,MON=stepper(P) LED=pulses (P/64)
SCLNLC=no-load, SDATD=tamper indicator, SYN=neg act power
0000101
5
TCS
1
Type of current sensor selection:
- TCS=0: Rogowski coil,
- TCS=1: Current transformer (CT)
0000110
6
FRS
1
Nominal base frequency:
- FRS=0: 50Hz
- FRS=1: 60Hz
0000111
7
FUND
Fundamental active and reactive energy:
- FUND=0: full bandwidth active energy controls the stepper;
full bandwidth reactive energy computation.
- FUND=1: fundamental active energy controls the stepper;
fundamental reactive energy computation



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