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STPMC1 Scheda tecnica(PDF) 29 Page - STMicroelectronics |
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STPMC1 Scheda tecnica(HTML) 29 Page - STMicroelectronics |
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29 / 77 page ![]() STPMC1 Theory of operation Doc ID 15728 Rev 6 29/77 Where: Imax = 2 16 Σ IX = IR + IS + IT + IN for SYS = 0, 1, 2, 3, 4, 7 Σ IX = IS + IT for SYS = 5, 6 Bit BCS is set according to Table 15 with ( Σ iX)RMS = (iR + iS + iT + iN)RMS Example 5: 3-ph system - BCS = 0 Let us consider a three-phase, four wires system where the RMS values of the current applied are: IR = 5 A IS = 5 A IT = 4.4 A IN = 0 A The sum of all instantaneous currents (iR + iS + iT + iN) should always be zero, unless there is a tamper condition. The STPMC1 calculates this sum and put its RMS value divided by four (called sIRMS) into register DMN (see paragraph 9.17.2). This value should always be zero (or very close). In our case: The currents are shown in Figure 11 below. ∑ > 256 I I max X Table 15. Tamper conditions BCS SYS = 0, 1, 2, 3, 4, 7 SYS = 5, 6 0 or or 1 or () 8 I i X RMS X ∑ ∑ < S T S I 7 9 I I 9 7 < < T S T I 7 9 I I 9 7 < < () 8 I i X RMS X ∑ ∑ > S T S I 7 9 I I 9 7 > > T S T I 7 9 I I 9 7 > > A 149967 . 0 4 i sIRMS RMS X = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ = ∑ |
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