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STPMC1 Scheda tecnica(PDF) 38 Page - STMicroelectronics |
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STPMC1 Scheda tecnica(HTML) 38 Page - STMicroelectronics |
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38 / 77 page ![]() Theory of operation STPMC1 38/77 Doc ID 15728 Rev 6 The ACR, ACS and ACT registers (bits [7:0], see paragraph 9.17.7) holds the information needed for this calculation. Let us indicate tRS, tST, tTR, the delays between R, S and T phases. It is: Equation 1 tRS + tST + tTR = T = 1 / ƒ Concatenating ACT[7:0], ACS[7:0], ACR[7:0] bytes, two 12 bits vectors defined as below are obtained: ACT[7:0], ACS[7:0], ACR[7:0] = Asr[12, 10:0], Art[12, 10:0] The delay times are calculated with the following formulas: Equation 2 Equation 3 From Equation 1, Equation 2 and Equation 3 it is possible to retrieve phase delays tRS, tST and tTR. Figure 13. Phase delay tRS tRS tST tST tTR tTR [] () [] MCLK 12 Asr 11 TR ST Asr f 8 1 2 0 : 10 Asr t t time ⋅ ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + − = − = [] () [] MCLK 12 Art 11 ST RS Art f 8 1 2 0 : 10 Art t t time ⋅ ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + − = − = |
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