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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STA321 Scheda tecnica(PDF) 65 Page - STMicroelectronics |
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STA321 Scheda tecnica(HTML) 65 Page - STMicroelectronics |
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65 / 157 page  STA321 ADC Doc ID 15351 Rev 3 65/157 10.2 Application schematic Figure 40. Typical connections for power supplies and inputs 10.2.1 Configuration example This is an example of the register setup for the ADC inputs. It is assumed that every peripheral is already configured and working correctly. There are other configuration examples to help you get started please refer to other chapters and also to Chapter 14: Register description on page 77 in order to get all the necessary and complementary details. Table 27 shows the register settings for selecting INL2 and INR2 as input source for SRC and SAI_out1 and using the PGA with a 12-dB gain. Table 27. Example register settings for ADC Register Value Description ADCCFG1 0x40 Selecting INL2 and INR2 as sources ADCCFG0 0x52 PGA Gain = +12 dB, PGA enabled, ADC clock on P2SDATA 0x40 ADC Data routed also to the SAI_out |
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