STA321 datasheet(20/157 Pages) STMICROELECTRONICS

20 / 157 page

Power-up and power-down sequences

STA321

20/157

Doc ID 15351 Rev 3

Power-up and power-down sequences

4.1

Device power-up

After providing the power supply to the device, it is necessary to wait until the DC regulator

PWUP time has elapsed before the device can be set up and used for normal operations.

(see Figure 7).

Figure 7.

Startup sequence

Table 8.

Power-up signal description

Signal/pin

Type

Description

VDDIO

Supply

Power supply of the digital pads (= VDDIO1,2)

VDD_REG

Supply

Power supply of the system core (= VDD_REG1,2)

PVDD

Supply

Power supply of the PLL

STBY

In (digital)

External standby signal provided by the user

RSTN

In (digital)

External reset signal provided by the user

PWDN

Internal

Power-down of the DC regulator cell, controlled by the core

A. OK

Internal

DC regulator status, when active the 1.8 V is provided to the core

I2C read

In (I2C)

Configuration commands coming to the I2C interface

I2C clock

Internal

I2C peripheral clock

XTI/MCLK

In (digital)

Clock input source

DC reg. PWUP time

Device in reset mode

Vdd ramp

RSTN (active L)

STBY (active H)

DC Reg. PWDN

(active High)

DC Reg. A. OK

I2C Writings

I2C CLK

XTI /MCLK

VDDIO

VDDREG

PVDD

3v3

2v2

User configuration via I

VVDDIO

VVDD_REG

VPVDD

STBY (active H)

RSTN (active L)

PWDN (active H)

A.OK (active H)

C read

C clock

XTI / MCLK

STA321 Scheda tecnica(PDF) 20 Page - STMicroelectronics

STA321 Scheda tecnica(HTML) 20 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL