WM9093ECSSLASHR datasheet(47/84 Pages) WOLFSON

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Production Data

WM9093

PD, March 2012, Rev 4.2

The register bits relating to pop suppression control are defined in Table 26.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1 (01h)

Power

Management

(1)

HPOUT1L_ENA

Headphone Output (HPL) input stage

enable

0 = Disabled

1 = Enabled

HPOUT1R_ENA

Headphone Output (HPR) input stage

enable

0 = Disabled

1 = Enabled

R96 (60h)

Analogue HP

HPOUT1L_RMV_

SHORT

Removes HPOUT1L short

0 = HPOUT1L short enabled

1 = HPOUT1L short removed

Note: Remove short after output stage

has been enabled.

HPOUT1L_OUTP

Enables HPOUT1L output stage

0 = Disabled

1 = Enabled

Note: Set after offset correction is

complete

HPOUT1L_DLY

Enables HPOUT1L intermediate stage

0 = Disabled

1 = Enabled

Note: Set with at least 20us delay after

HPOUT1L_ENA has been set.

HPOUT1R_RMV_

SHORT

Removes HPOUT1R short

0 = HPOUT1R short enabled

1 = HPOUT1R short removed

Note: Remove short after output stage

has been enabled.

HPOUT1R_OUTP

Enables HPOUT1R output stage

0 = Disabled

1 = Enabled

Note: Set after offset correction is

complete

HPOUT1R_DLY

Enables HPOUT1R intermediate stage

0 = Disabled

1 = Enabled

Note: Set with at least 20us delay after

HPOUT1R_ENA has bee set.

Table 26 Pop Suppression Control

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