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TLC32046MFKB Scheda tecnica(PDF) 25 Page - Texas Instruments |
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TLC32046MFKB Scheda tecnica(HTML) 25 Page - Texas Instruments |
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25 / 56 page ![]() 2–11 VCC + RESET VCC – 200 k Ω 5 V 0.5 µF – 5 V TLC32046 Figure 2–3. Reset on Power-Up Circuit 2.17 Power-Up Sequence To ensure proper operation of the AIC and as a safeguard against latch-up, it is recommended that Schottky diodes with forward voltages less than or equal to 0.4 V be connected from VCC– to ANLG GND and from VCC– to DGTL GND. In the absence of such diodes, power is applied in the following sequence: ANLG GND and DGTL GND, VCC–, then VCC+ and VDD. Also, no input signal is applied until after power-up. 2.18 AIC Register Constraints The following constraints are placed on the contents of the AIC registers: 1. TA register must be ≥ 4 in word mode (WORD/BYTE= high). 2. TA register must be ≥ 5 in byte mode (WORD/BYTE= low). 3. TA ′ register can be either positive, negative, or zero. 4. RA register must be ≥ 4 in word mode (WORD/BYTE = high). 5. RA register must be ≥ 5 in byte mode (WORD/BYTE = low). 6. RA ′ register can be either positive, negative, or zero. 7. (TA register ± TA′ register) must be > 1. 8. (RA register ± RA′ register) must be > 1. 9. TB register must be ≥ 15. 10. RB register must be ≥ 15. 2.19 AIC Responses to Improper Conditions The AIC has provisions for responding to improper conditions. These improper conditions and the response of the AIC to these conditions are presented in Table 2– 4. |
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