CS22210 PCI/USB Wireless Controller

30 of 31

D556PP2

Rev. 3.0

www.cirrus.com

Table 12. Radio MAC AC Timings – RFMD Modes

Parameter

Parameter Description

Min

Max

Units

BBRNW output delay from falling BBSCLK

6.7

ns

nBBCS output delay from falling BBSCLK

110.79

ns

BBSDX output delay from falling BBSCLK

7.0

ns

BBSDX setup to rising edge of BBSCLK

14.5

ns

BBSDX hold from rising edge of BBSCLK

0.0

ns

TXD output delay from rising TXCLK (SMAC

Mode)

33.5

ns

TXD output delay from rising TXCLK (RMAC

Mode)

15.4

ns

RXD setuptorising edgeofRXCLK

1.0

ns

RXD hold from rising edge of RXCLK

1.8

ns

MDRDY setup to falling edge of RXCLK

2

ns

MDRDY hold from falling edge of RXCLK

1

ns

TXPEBB output delay from rising TXCLK

15.0

ns

RXPEBB output delay from rising RXCLK

16.0

ns

TXRDY setup to falling edge of TXCLK

6.5

ns

TXRDY hold from falling edge of TXCLK

0

ns

Notes:

1.

Signal is double synchronized to ARMCLKIN.

2.

ARMCLK must be at least 4 times the TXCLK and RXCLK frequency.

3.

TXD delay in 802.11b mode is the result of sampling the TXCLK with the ctlclk, therefore the maximum

delay is equal to two ctlclk periods plus the flop-to-output delay. In this table, ctlclk is assumed to have a 13 ns

period.

4.

BBNCS output delay = [(1/ARMCLK freq)*ceiling(SER_CLK_DIV/2)] + 7ns, the specified value is based on

ARMCLK of 77 Mhz and SER_CLK_DIV=8.

5.2

Table 13. Package Specifications

Symbol

Parameter

Value

Units

θ

JC

Junction-to-Case Thermal

Resistance

5

°C/W

θ

JA

Junction-to-Open Air Thermal

Resistance

29.4

°C/W

Max Power Dissipation

1.0

W

Max Junction Temperature

105

°C

Notes:

1. ARMCLK / MEMCLK = 77MHz