XC164CS datasheet(59/71 Pages) INFINEON

59 / 71 page

XC164

Derivatives

Electrical Parameters

Data Sheet

V2.1, 2003-06

Sample time and conversion time of the XC164’s A/D Converter are programmable. In

compatibility mode, the above timing can be calculated using Table 14.

The limit values for

fBC must not be exceeded when selecting ADCTC.

Converter Timing Example:

Assumptions:

fSYS

= 40 MHz (i.e.

tSYS = 25 ns), ADCTC = ‘01’, ADSTC = ‘00’.

Basic clock

fBC

fSYS / 2 = 20 MHz, i.e. tBC = 50 ns.

Sample time

tBC × 8 = 400 ns.

Conversion 10-bit:

With post-calibr.

tC10P = 52 × tBC + tS + 6 × tSYS = (2600 + 400 + 150) ns = 3.15 µs.

Post-calibr. off

tC10

= 40

× t

BC + tS + 6 × tSYS = (2000 + 400 + 150) ns = 2.55 µs.

Conversion 8-bit:

With post-calibr.

tC8P

= 44

× t

BC + tS + 6 × tSYS = (2200 + 400 + 150) ns = 2.75 µs.

Post-calibr. off

tC8

= 32

× t

BC + tS + 6 × tSYS = (1600 + 400 + 150) ns = 2.15 µs.

Table 14

A/D Converter Computation Table1)

These selections are available in compatibility mode. An improved mechanism to control the ADC input clock

can be selected.

ADCON.15|14

(ADCTC)

A/D Converter

Basic Clock

fBC

ADCON.13|12

(ADSTC)

Sample time

fSYS / 4

tBC × 8

fSYS / 2

tBC × 16

fSYS / 16

tBC × 32

fSYS / 8

tBC × 64

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