XC164CS datasheet(21/71 Pages) INFINEON

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XC164

Derivatives

Functional Description

Data Sheet

V2.1, 2003-06

3.2

External Bus Controller

All of the external memory accesses are performed by a particular on-chip External Bus

Controller (EBC). It can be programmed either to Single Chip Mode when no external

memory is required, or to one of four different external memory access modes1), which

are as follows:

– 16

…24-bit Addresses, 16-bit Data, Demultiplexed

– 16

…24-bit Addresses, 16-bit Data, Multiplexed

– 16

…24-bit Addresses, 8-bit Data, Multiplexed

– 16

…24-bit Addresses, 8-bit Data, Demultiplexed

In the demultiplexed bus modes, addresses are output on PORT1 and data is input/

output on PORT0 or P0L, respectively. In the multiplexed bus modes both addresses

and data use PORT0 for input/output. The high order address (segment) lines use

Port 4. The number of active segment address lines is selectable, restricting the external

address space to 8 Mbytes

…64 Kbytes. This is required when interface lines are

assigned to Port 4.

Up to 4 external CS signals (3 windows plus default) can be generated in order to save

external glue logic. External modules can directly be connected to the common address/

data bus and their individual select lines.

Important timing characteristics of the external bus interface have been made

programmable (via registers TCONCSx/FCONCSx) to allow the user the adaption of a

wide range of different types of memories and external peripherals.

In addition, up to 4 independent address windows may be defined (via registers

ADDRSELx) which control the access to different resources with different bus

characteristics. These address windows are arranged hierarchically where window 4

overrides window 3, and window 2 overrides window 1. All accesses to locations not

covered by these 4 address windows are controlled by TCONCS0/FCONCS0. The

currently active window can generate a chip select signal.

The external bus timing is related to the rising edge of the reference clock output

CLKOUT. The external bus protocol is compatible with that of the standard C166 Family.

The EBC also controls accesses to resources connected to the on-chip LXBus. The

LXBus is an internal representation of the external bus and allows accessing integrated

peripherals and modules in the same way as external components.

The TwinCAN module is connected and accessed via the LXBus.

Bus modes are switched dynamically if several address windows with different mode settings are used.

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