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C161PI Scheda tecnica(PDF) 54 Page - Infineon Technologies AG |
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C161PI Scheda tecnica(HTML) 54 Page - Infineon Technologies AG |
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54 / 82 page ![]() &3, Data Sheet 52 1999-07 Sample time and conversion time of the C161PI’s A/D Converter are programmable. The table below should be used to calculate the above timings. The limit values for I BC must not be exceeded when selecting ADCTC. Converter Timing Example: Assumptions: I CPU = 25 MHz (i.e. W CPU = 40 ns), ADCTC = ’00’, ADSTC = ’00’. Basic clock I BC = I CPU / 4 = 6.25 MHz, i.e. WBC = 160 ns. Sample time W S = W BC * 8 = 1280 ns. Conversion time W C = W S + 40 WBC + 2 WCPU = (1280 + 6400 + 80) ns = 7.8 µs. Memory Cycle Variables The timing tables below use three variables which are derived from the BUSCONx registers and represent the special characteristics of the programmed memory cycle. The following table describes, how these variables are to be computed. Table 9 A/D Converter Computation Table ADCON.15|14 (ADCTC) A/D Converter Basic clock I BC ADCON.13|12 (ADSTC) Sample time W S 00 I CPU / 4 00 W BC * 8 01 I CPU / 2 01 W BC * 16 10 I CPU / 16 10 W BC * 32 11 I CPU / 8 11 W BC * 64 Table 10 Memory Cycle Variables Description Symbol Values ALE Extension W A TCL * <ALECTL> Memory Cycle Time Waitstates W C 2TCL * (15 - <MCTC>) Memory Tristate Time W F 2TCL * (1 - <MTTC>) |
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