 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
MB9DF565MLE Scheda tecnica(PDF) 45 Page - SPANSION |
|
|
|||||||||||||||||||||||||||||
MB9DF565MLE Scheda tecnica(HTML) 45 Page - SPANSION |
|
|
45 / 109 page  D at aS he e t 44 MB9D560_DS708-00001-3v0-E, May 15, 2015 CONFIDENTIAL 9. Block Diagram Note: − In the block diagram, block name (Config, Slave) describe bus connection for register setting of control block. I$ #1 D$ #1 I$ #0 D$ #0 AHB-32 AXI2AHB AHB-32 AXI2AHB AHB-32 AHB-32 CLK_PERI0 CLK_PERI0 CLK_PERI5 CLK_PERI4 Core Group (2-Core) TCFLASH #0 TCRAM #0 TCRAM #1 Security TCFLASH #1 Security ETM #1 ETM #0 Debug Group (CoreSightTM) Debug I/F (JTAG) AHB-M APB-S APB-M Security JTAG Wakeup APB-32 Trace Group Debug APB ETB (Trace Buffer) AHB2APB (Priviledge Protection) Security Checker JTAG_SWCLKTCK CLK_DBG CommonPeripheral Group CAN Prescaler 16-bit Base Timer [PWM/PPG/RLT/PWC] (ch.0 to 11) MPU AHB (Config, Slave) AHB-32 CAN (ch.0 to 2) RAM AHB2APB 32-bit FRT (ch.0 to 4) 32-bit ICU (unit0 to 2, ch.0 to 5) MFS (ch.0 to 4) CRC (ch.0 to 1) CR Calibration APB-32 DMAC (Config, Slave) BBU GPIO Port Pin Config (Config, Slave) Resource Input Config (Config, Slave) CLK_PERI0 CLK_PERI1 AXI2AHB High Performance Matrix (HPM) AXI2AHB AXI2AHB AXI-64 AXI2AHB MPU AHB AHB2AXI DMAC (ch.0 to 15) Exclusive Access Memory (EAM) AXI-S AHB2AXI AHB-64 CLK_DMA CLK_HPM Memory & Config Group AHB-64 BBU TCRAM #0 (Config, Slave) TCFLASH #0 (Config, Slave) TCRAM #1 (Config, Slave) TCFLASH #1 (Config, Slave) WorkFLASH #1 BootROM TPU#0 IRC #0 RAM Security Protection TPU#1 IRC #1 RAM WorkFLASH #0 Security IPCU NMI distribution Wakeup Request #0 Wakeup Request #1 CLK_MEMC MCU Config Group AHB-32 HW-WDT EXT-IRQ (NMI) SW-WDT #0 System Controller (SYSC) RST manage Clock Mode control State SCT LVD Wakeup detect Clock output PONR CSV Fast-CR PLL Slow-CR SW-WDT #1 BBU CLK_SYSC_PD1 ApplicationSpecific Peripheral Group PORT MUX (Port Pin Config) I/O Resource Input Configuration BBU BBU CLK_PERI6 CLK_PERI7 FlexRay (A+Bch) WFG (unit0, ch.0 to 5) 16-bit FRT for RDC (ch.18) 16-bit OCU (unit0 to 2, ch.0 to 5) 4ch-SH ADC (unit0, ch.0 to 3) MVA (unit 0) 8/16bit UDC (ch.0 to 1) 16-bit ICU (unit0 to 1, ch.0 to 3) 16-bit FRT (ch.0 to 5) RDC (unit 0) DAC (ch.0) FlexRay/RDC Clock Control Clock Monitor RDC (unit 1) DAC (ch.1) WFG (unit1, ch.6 to 11) 16-bit FRT for RDC (ch.19) 16-bit OCU (unit3 to 5, ch.6 to 11) 4ch-SH ADC (unit1, ch.4 to 7) MVA (unit 1) 8/16bit UDC (ch.2 to 3) 16-bit ICU (unit2 to 3, ch.4 to 7) 16-bit FRT (ch.6 to 11) 16-bit FRT (ch.12 to 17) 16bit OCU (unit6 to 11, ch.12 to 23) 16-bit ICU (unit4 to 7, ch.8 to 14) WFG (unit2 to 3, ch.12 to 23) 12-bit A/D Converter (ch.0 to 31) AHB2RBus AHB2APB Application Specific Peripheral Group A Application Specific Peripheral Group B AHB-M Processor B0TCM ATCM #0 MPU #1 B1TCM #0 AXI-S ATCM #1 B0TCM B1TCM #1 LLPP(AXI32-M) AXI-M AXI-M AXI-S LLPP(AXI32-M) CPU #0 CPU #1 MPU #0 CLK_CPU0 CLK_CPU1 CortexTM-R5F CortexTM-R5F DAP Debug APB CLK_ATB CLK_ATB AHB-M APB-S APB-M Security |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
