LSM6DSLTR datasheet(79/113 Pages) STMICROELECTRONICS

79 / 113 page

DocID028475 Rev 5

79/113

LSM6DSL

113

9.56

FIFO_STATUS4 (3Dh)

FIFO status control register (r). For a proper reading of the register, it is recommended to set

the BDU bit in CTRL3_C (12h) to 1.

Table 144. FIFO_STATUS4 register

Table 145. FIFO_STATUS4 register description

9.57

FIFO_DATA_OUT_L (3Eh)

FIFO data output register (r). For a proper reading of the register, it is recommended to set

the BDU bit in CTRL3_C (12h) to 1.

9.58

FIFO_DATA_OUT_H (3Fh)

FIFO data output register (r). For a proper reading of the register, it is recommended to set

the BDU bit in CTRL3_C (12h) to 1.

000000

FIFO_

PATTERN_9

FIFO_

PATTERN_8

FIFO_

PATTERN_[9:8]

Word of recursive pattern read at the next reading.

Table 146. FIFO_DATA_OUT_L register

DATA_

OUT_

FIFO_L_7

DATA_

OUT_

FIFO_L_6

DATA_

OUT_

FIFO_L_5

DATA_

OUT_

FIFO_L_4

DATA_

OUT_

FIFO_L_3

DATA_

OUT_

FIFO_L_2

DATA_

OUT_

FIFO_L_1

DATA_

OUT_

FIFO_L_0

Table 147. FIFO_DATA_OUT_L register description

DATA_OUT_FIFO_L_[7:0]

FIFO data output (first byte)

Table 148. FIFO_DATA_OUT_H register

DATA_

OUT_

FIFO_H_7

DATA_

OUT_

FIFO_H_6

DATA_

OUT_

FIFO_H_5

DATA_

OUT_

FIFO_H_4

DATA_

OUT_

FIFO_H_3

DATA_

OUT_

FIFO_H_2

DATA_

OUT_

FIFO_H_1

DATA_

OUT_

FIFO_H_0

Table 149. FIFO_DATA_OUT_H register description

DATA_OUT_FIFO_H_[7:0]

FIFO data output (second byte)

LSM6DSLTR Scheda tecnica(PDF) 79 Page - STMicroelectronics

LSM6DSLTR Scheda tecnica(HTML) 79 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL