HT48R50A datasheet(21/46 Pages) HOLTEK

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HT48R50A-1

Rev. 1.10

July 2, 2001

counting enable or disable and active edge.

The TM0, TM1 bits define the operating mode.

The event count mode is used to count external

events, which means the clock source comes

from an external (TMR0/TMR1) pin. The timer

mode functions as a normal timer with the

clock source coming from the fINT clock/instruc-

tion clock or RTC clock (Timer0/Timer1). The

pulse width measurement mode can be used to

count the high or low level duration of the external

signal (TMR0/TMR1). The counting is based on

the fINT clock/instruction clock or RTC clock

(Timer0/Timer1).

In the event count or timer mode, once the

Timer/Event Counter 0/1 starts counting, it will

count from the current contents in the

Timer/Event Counter 0/1 to FFH or FFFFH.

Once overflow occurs, the counter is reloaded

from the Timer/Event Counter 0/1 preload regis-

ter and generates the interrupt request flag

(T0F/T1F; bit 5/6 of INTC) at the same time.

In the pulse width measurement mode with

the TON and TE bits equal to one, once the

TMR0/TMR1 has received a transient from low

to high (or high to low if the TE bits is "0") it will

start counting until the TMR0/TMR1 returns to

the original level and resets the TON. The mea-

sured result will remain in the Timer/Event

Counter 0/1 even if the activated transient oc-

curs again. In other words, only one cycle mea-

surement can be done. Until setting the TON,

the cycle measurement will function again as

long as it receives further transient pulse. Note

that, in this operating mode, the Timer/Event

Counter 0/1 starts counting not according to the

logic level but according to the transient edges.

In the case of counter overflows, the counter 0/1

is reloaded from the Timer/Event Counter 0/1

preload register and issues the interrupt re-

quest just like the other two modes. To enable

the counting operation, the timer ON bit (TON;

bit 4 of TMR0C/TMR1C) should be set to 1. In

the pulse width measurement mode, the TON

will be cleared automatically after the mea-

surement cycle is completed. But in the other

two modes the TON can only be reset by in-

structions. The overflow of the Timer/Event

Counter 0/1 is one of the wake-up sources. No

matter what the operation mode is, writing a 0

to ET0I/ET1I can disable the corresponding in-

terrupt services.

In the case of Timer/Event Counter 0/1 OFF

condition, writing data to the Timer/Event

Counter 0/1 preload register will also reload

that data to the Timer/Event Counter 0/1. But

if the Timer/Event Counter 0/1 is turned on,

data written to it will only be kept in the

Timer/Event Counter 0/1 preload register. The

Timer/Event Counter 0/1 will still operate until

overflow occurs (a Timer/Event Counter 0/1 re-

loading will occur at the same time). When the

Timer/Event Counter 0/1 (reading TMR0/TMR1)

is read, the clock will be blocked to avoid errors.

As clock blocking may results in a counting error,

this must be taken into consideration by the pro-

grammer.

The bit0~bit2 of the TMR0C can be used to de-

fine the pre-scaling stages of the internal clock

sources of Timer/Event Counter 0. The defini-

tions are as shown. The overflow signal of

Timer/Event Counter 0 can be used to generate

PFD signals for buzzer driving.

Input/output ports

There are 35 bidirectional input/output lines in

the microcontroller, labeled from PA to PD and

PG, which are mapped to the data memory of

[12H], [14H], [16H], [18H] and [1EH] respec-

tively. All of these I/O ports can be used for input

and output operations. For input operation, these

ports are non-latching, that is, the inputs must be

ready at the T2 rising edge of instruction "MOV

A,[m]" (m=12H, 14H, 16H, 18H or 1EH). For out-

put operation, all the data is latched and remains

unchanged until the output latch is rewritten.

Each I/O line has its own control register (PAC,

PBC, PCC, PDC, PGC) to control the input/out-

put configuration. With this control register,

CMOS output or Schmitt trigger input with or

without pull-high resistor structures can be re-

configured dynamically (i.e. on-the-fly) under

software control. To function as an input, the

corresponding latch of the control register must

write "1". The input source also depends on the

control register. If the control register bit is "1",

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