HT48R50A datasheet(33/46 Pages) HOLTEK

33 / 46 page

CPLA [m]

Complement data memory and place result in the accumulator

Description

Each bit of the specified data memory is logically complemented (1's comple-

ment). Bits which previously contained a 1 are changed to 0 and vice-versa.

The complemented result is stored in the accumulator and the contents of

the data memory remain unchanged.

Operation

ACC ¬ [m]

Affected flag(s)

TC2 TC1

¾Ö¾

DAA [m]

Decimal-Adjust accumulator for addition

Description

The accumulator value is adjusted to the BCD (Binary Coded Decimal) code.

The accumulator is divided into two nibbles. Each nibble is adjusted to the

BCD code and an internal carry (AC1) will be done if the low nibble of the ac-

cumulator is greater than 9. The BCD adjustment is done by adding 6 to the

original value if the original value is greater than 9 or a carry (AC or C) is set;

otherwise the original value remains unchanged. The result is stored in the

data memory and only the carry flag (C) may be affected.

Operation

If ACC.3~ACC.0 >9 or AC=1

then [m].3~[m].0 ¬ (ACC.3~ACC.0)+6, AC1=AC

else [m].3~[m].0) ¬ (ACC.3~ACC.0), AC1=0

and

If ACC.7~ACC.4+AC1 >9 or C=1

then [m].7~[m].4 ¬ ACC.7~ACC.4+6+AC1,C=1

else [m].7~[m].4 ¬ ACC.7~ACC.4+AC1,C=C

Affected flag(s)

TC2 TC1

¾¾¾¾¾

DEC [m]

Decrement data memory

Description

Data in the specified data memory is decremented by 1.

Operation

[m] ¬ [m]-1

Affected flag(s)

TC2 TC1

¾Ö¾

HT48R50A-1

Rev. 1.10

July 2, 2001

HT48R50A Scheda tecnica(PDF) 33 Page - Holtek Semiconductor Inc

HT48R50A Scheda tecnica(HTML) 33 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Scheda tecnica Scarica

Link URL