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ADAU1772BCPZ-R7 Scheda tecnica(PDF) 75 Page - Analog Devices |
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ADAU1772BCPZ-R7 Scheda tecnica(HTML) 75 Page - Analog Devices |
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75 / 117 page  ADAU1772 Data Sheet Rev. C | Page 74 of 116 Bits Bit Name Settings Description Reset Access 10 Serial Input Port Channel 4/Serial Input Port Channel 5 11 Serial Input Port Channel 6/Serial Input Port Channel 7 1 ASRC_OUT_EN Output ASRC enable. 0x0 RW 0 Disabled 1 Enabled 0 ASRC_IN_EN Input ASRC enable. 0x0 RW 0 Disabled 1 Enabled ADC0/ADC1 CONTROL 0 REGISTER Address: 0x001B, Reset: 0x19, Name: ADC_CONTROL0 Table 56. Bit Descriptions for ADC_CONTROL0 Bits Bit Name Settings Description Reset Access 4 ADC1_MUTE Mute ADC1. Muting is accomplished by setting the volume control to maximum attenuation. This bit has no effect if volume control is bypassed. 0x1 RW 0 Unmuted 1 Muted 3 ADC0_MUTE Mute ADC0. Muting is accomplished by setting the volume control to maximum attenuation. This bit has no effect if volume control is bypassed. 0x1 RW 0 Unmuted 1 Muted [1:0] ADC_0_1_FS Sets ADC sample rate. 0x1 RW 00 96 kHz 01 192 kHz 10 Reserved 11 Reserved |
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