HM25Q40C datasheet(5/62 Pages) HMSEMI

5 / 62 page

Preliminary Datasheet

The

HM25Q40A support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as

2-clocks instruction cycle Quad Peripheral Interface : Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1

(DO), I/O2 (WP#), and I/O3 (HOLD# / RESET#). SPI clock frequencies of up to 104MHz are supported

allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 44MHz (104MHz x 4) for Quad I/O

when using the Fast Read Dual/Quad I/O . These transfer rates can outperform standard Asynchronous 8 and

16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as

8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation.

A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide

further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device ID and

SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers.

The

HM25Q40A/20 provides an ideal storage solution for systems with limited space, signal connections,

and power. These memories' flexibility and performance is better than ordinary serial flash devices. They are

ideal for code shadowing to RAM, executing code directly (XIP), and storing reprogrammable data.

HM25Q40A

HM25Q40C Scheda tecnica(PDF) 5 Page - Shenzhen Huazhimei Semiconductor Co., Ltd