JS28F256P30T85 datasheet(76/102 Pages) INTEL

76 / 102 page

1-Gbit P30 Family

April 2005

Intel StrataFlash® Embedded Memory (P30)

Datasheet

Order Number: 306666, Revision: 001

Note:

Always clear the Status Register prior to resuming erase operations. It avoids Status Register

ambiguity when issuing commands during Erase Suspend. If a command sequence error occurs

during an erase-suspend state, the Status Register contains the command sequence error status

(SR[7,5,4] set). When the erase operation resumes and finishes, possible errors during the erase

operation cannot be detected via the Status Register because it contains the previous error status.

14.1.1

Clear Status Register

The Clear Status Register command clears the status register. It functions independent of VPP. The

Write State Machine (WSM) sets and clears SR[7,6,2], but it sets bits SR[5:3,1] without clearing

them. The Status Register should be cleared before starting a command sequence to avoid any

ambiguity. A device reset also clears the Status Register.

14.2

Read Device Identifier

The Read Device Identifier command instructs the device to output manufacturer code, device

identifier code, block-lock status, protection register data, or configuration register data (see

Section 9.2, “Device Commands” on page 50 for details on issuing the Read Device Identifier

command). Table 29, “Device Identifier Information” on page 77 and Table 30, “Device ID codes”

on page 77 show the address offsets and data values for this device.

Erase Status (ES)

0 = Erase successful.

1 = Erase fail or program sequence error when set with SR[4,7].

Program Status (PS)

0 = Program successful.

1 = Program fail or program sequence error when set with SR[5,7]

3VPP Status (VPPS)

0 = VPP within acceptable limits during program or erase operation.

1 = VPP < VPPLK during program or erase operation.

Program Suspend Status

(PSS)

0 = Program suspend not in effect.

1 = Program suspend in effect.

Block-Locked Status

(BLS)

0 = Block not locked during program or erase.

1 = Block locked during program or erase; operation aborted.

BEFP Status (BWS)

DWS

BWS

= WSM is busy and buffer is available for loading.

= WSM is busy and buffer is not available for loading.

= WSM is not busy and buffer is available for loading.

= Reserved for Future Use (RFU).

Table 28.

Status Register Description (Sheet 2 of 2)

Status Register (SR)

Default Value = 0x80

JS28F256P30T85 Scheda tecnica(PDF) 76 Page - Intel Corporation

JS28F256P30T85 Scheda tecnica(HTML) 76 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL