R5F572TFGDFP datasheet(119/176 Pages) RENESAS

119 / 176 page

R01DS0331EJ0100 Rev.1.00

Page 119 of 176

Feb 08, 2019

RX72T Group

5. Electrical Characteristics

5.4

AC Characteristics

Note 1. This restriction is only applied when a 12-bit A/D converter is to be used.

Note 2. This restriction is only applied when flash memory is to be programmed or erased.

Note 3. The maximum frequencies of each clock based on the frequency of ICLK are listed below.

ICLK = 200 MHz, PCLKA = 100 MHz, PCLKB = 50 MHz, PCLKC = 200 MHz, PCLKD = 50 MHz, FCLK = 50 MHz, BCLK =

50 MHz, BCLK pin output = 25 MHz

ICLK = 120 MHz, PCLKA = 120 MHz, PCLKB = 60 MHz, PCLKC = 120 MHz, PCLKD = 60 MHz, FCLK = 60 MHz,

BCLK = 60 MHz, BCLK pin output = 30 MHz

ICLK = 160 MHz, PCLKA = 80 MHz, PCLKB = 40 MHz, PCLKC = 160 MHz, PCLKD = 40 MHz, FCLK = 40 MHz,

BCLK = 40 MHz, BCLK pin output = 40 MHz

Table 5.12

Operating Frequency

Conditions: VCC = 2.7 to 5.5 V, VCC_USB = 2.7 to 5.5 V, AVCC0 = AVCC1 = AVCC2 = 3.0 to 5.5V,

VSS = VSS_USB = AVSS0 = AVSS1 = AVSS2 = 0 V,

Ta = Topr

Item

Symbol

Min.

Typ.

Max.*3

Unit

Test Conditions

System clock (ICLK)

—

200

MHz

Peripheral module clock (PCLKA)

—

120

Peripheral module clock (PCLKB)

—

Peripheral module clock (PCLKC)

—

200

Peripheral module clock (PCLKD)

8*1

—

AVCC0 = AVCC1 = AVCC2 ≥ 4.5 V

8*1

—

AVCC0 = AVCC1 = AVCC2 < 4.5 V

Flash-IF clock (FCLK)

4*2

—60

External bus clock (BCLK)

—

BCLK pin output

—

VCC ≥ 4.5 V,

High-drive output is selected in the

driving ability control register.

——

USB clock (UCLK)

—

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