RTI-19
CONTROL PINS
NAME
PIN NUMBER
TYPE
ACTIVE
DESCRIPTION
LCC
PGA
CS
44
E9
TI
AL
Chip Select. Active low input for host access of
transparent memory or the RTI internal registers. In
the transparent memory configuration CS is propa-
gated through the RTI to the RCS output.
CTRL
50
C11
TI
AL
Control. The host processor uses the active low
CTRL input signal in conjunction with CS and RD/
WR to access the RTI internal registers. CTRL is
also used in the software assignment of the terminal
address and programmed reset.
ADOEN
15
L3
TI
AL
Address Output Enable. When ADOEN is low the
Address Out bus (ADDR OUT (15:0)) is active. If
ADOEN = 1 the Address Out bus is high impedance.
RD/WR
46
E10
TI
--
Read/Write. The host processor uses a high level on
this input in conjunction with CS and CTRL to read
the RTI internal registers. A low level on this input is
used in conjunction with CS and CTRL to write to
internal RTI registers. In the transparent memory
configuration RD/WR is propagated through the RTI
to the RRD/RWR output.
BCEN
25
K7
TUI
AL
Broadcast Enable. Active low input enables broad-
cast commands.
ILL COMM
20
L5
TDI
AH
Illegal Command. The host processor uses the ILL
COMM input to inform the RTI that the present
command is illegal. ILL COMM is used in conjunc-
tion with MCSA(4:0) and MC/SA to define system
dependent illegal commands.
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