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BT817/8 Advanced Embedded Video Engine Datasheet

Version 1.1

Document No.: BRT_000302 Clearance No.: BRT#154

Address

(hex)

Bit

Reset

value

Description

302618h

REG_PCLK_2X

1 r/w

0 Core scan out 2 pixel data per

system clock

309000h

REG_TRACKER

32 r/w

0 Tracker register 0

309004h

REG_TRACKER_1

32 r/w

0 Tracker register 1

309008h

REG_TRACKER_2

32 r/w

0 Tracker register 2

30900Ch

REG_TRACKER_3

32 r/w

0 Tracker register 3

309010h

REG_TRACKER_4

32 r/w

0 Tracker register 4

309014h

REG_MEDIAFIFO_READ

32 r/o

- Media FIFO read offset

309018h

REG_MEDIAFIFO_WRITE

32 r/w

0 Media FIFO write offset

309024h

REG_FLASH_SIZE

32 r/o

- Detected flash capacity, in

Mbytes

30902Ch

REG_ANIM_ACTIVE

32 r/o

- 32-bit mask of currently playing

animations

30914Eh

REG_PLAY_CONTROL

8 r/w

0 Video playback control. 0: pause,

1: play, ffh: exit

Table 5-2 Overview of BT817/8 Registers

Note: All register addresses are 4-byte aligned. The value in the “Bits” column refers to the number of

valid bits from bit 0 unless otherwise specified; other bits are reserved.

5.2 Chip ID

The BT817/8 Chip ID can be read at memory location 0C0000h – 0C0003h. The reset values of these

bytes are:

0C0000h: 08h

0C0001h: 17h (BT817), 18h(BT818)

0C0002h: 01h

0C0003h: 00h

Note that the Chip ID memory location is part of RAM_G, which can be over-written by the user

software. A reset event defined in section 4.9.4 will bring back the Chip ID information in these memory

locations.

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