M95256-R datasheet(29/51 Pages) STMICROELECTRONICS

29 / 51 page

Table 13. Cycling performance by groups of four bytes

Symbol

Parameter

Test condition

Min.

Max.

Unit

Ncycle

Write cycle endurance(1)

TA ≤ 25 °C, VCC(min) < VCC < VCC(max)

4,000,000

Write cycle(2)

TA = 85 °C, VCC(min) < VCC < VCC(max)

1,200,000

1. The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where

N is an integer. The Write cycle endurance is evaluated by characterization and qualification.

2. A Write cycle is executed when either a Page write, a Byte write, a WRSR, a WRID or an LID instruction is decoded. When

using the Byte write, the Page write or the WRID instruction, refer also to Section 6.6.1 Cycling with Error Correction Code

(ECC x 4).

Table 14. Memory cell data retention

Parameter

Test condition

Min.

Max.

Unit

Data retention(1)

TA = 55 °C

200

Year

1. The data retention behaviour is checked in production, while the 200-year limit is evaluated by characterization and

qualification results.

Table 15. Capacitance

Symbol

Parameter

Test condition(1)

Min.

Max.

Unit

COUT

Output capacitance (Q)

VOUT = 0 V

CIN

Input capacitance (D)

VIN = 0 V

Input capacitance (other pins)

VIN = 0 V

1. Evaluated By Characterization at TA = 25 °C and frequency of 5 MHz – Not tested in production.

M95256-W M95256-R M95256-DF

DC and AC parameters

DS4712 - Rev 22

page 29/51

M95256-R Scheda tecnica(PDF) 29 Page - STMicroelectronics

M95256-R Scheda tecnica(HTML) 29 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

Scheda tecnica Scarica

Link URL