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LPC2888 Scheda tecnica(PDF) 12 Page - NXP Semiconductors |
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LPC2888 Scheda tecnica(HTML) 12 Page - NXP Semiconductors |
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12 / 34 page ![]() LPC2880_LPC2888_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01 — 22 June 2006 12 of 34 Philips Semiconductors LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface 6. Functional description 6.1 Architectural overview The LPC2880/LPC2888 includes an ARM7TDMI CPU with an 8 kB cache, an AMBA AHB interfacing to high-speed on-chip peripherals and internal and external memory, and four AMBA APBs for connection to other on-chip peripheral functions. The LPC2880/LPC2888 includes a multi-layer AHB and four separate APBs, in order to minimize interference between the USB controller, other DMA operations, and processor activity. Bus masters include the ARM7 itself, the USB block, and the general purpose DMA controller. Lower speed peripheral functions are connected to the APB buses. The four AHB-to-APB bridges interface the APB buses to the AHB bus. 6.1.1 ARM7TDMI processor The ARM7TDMI is a general purpose 32-bit microprocessor that offers high performance and very low power consumption. The ARM architecture is based on RISC principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed CISCs. This simplicity results in a high instruction throughput and impressive real-time interrupt response from a small and cost-effective processor core. Pipeline techniques are employed so that all parts of the processing and memory systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, and a third instruction is being fetched from memory. The ARM7TDMI processor also employs a unique architectural strategy known as Thumb, which makes it ideally suited to high-volume applications with memory restrictions, or applications where code density is an issue. The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the ARM7TDMI processor has two instruction sets: • The standard 32-bit ARM instruction set. • A 16-bit Thumb instruction set. The Thumb set’s 16-bit instruction length allows it to approach twice the density of standard ARM code while retaining most of the ARM’s performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because Thumb code operates on the same 32-bit register set as ARM code. Thumb code is able to provide down to 65 % of the code size of ARM, and 160 % of the performance of an equivalent ARM processor connected to a 16-bit memory system. The ARM7TDMI processor is described in detail on the ARM web site. 6.1.2 On-chip flash memory system The LPC2880/LPC2888 includes a 1 MB flash memory system. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be programmed In System via the USB port. The application program may also erase and/or program the flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc. |
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