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LPC2888 Scheda tecnica(PDF) 20 Page - NXP Semiconductors |
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LPC2888 Scheda tecnica(HTML) 20 Page - NXP Semiconductors |
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20 / 34 page ![]() LPC2880_LPC2888_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01 — 22 June 2006 20 of 34 Philips Semiconductors LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface • An interrupt to the processor can be generated on DMA completion, when a DMA channel is halfway to completion, or when a DMA error has occurred. 6.13 UART and IrDA The LPC2880/LPC2888 contains one UART with baud rate generator and IrDA support. 6.13.1 Features • 32-B Receive and Transmit FIFOs. • Register locations conform to the 16C650 industry standard. • Receiver FIFO trigger points at 1 B, 16 B, 24 B, and 28 B. • Built-in baud rate generator. • CGU generates UART clock including fractional divider capability. • Auto baud capability. • Optional hardware flow control. • IrDA mode for infrared communication. 6.14 I2C-bus interface The LPC2880/LPC2888 I2C-bus interface is byte oriented and has four operating modes: master Transmit mode, master Receive mode, slave Transmit mode and slave Receive mode. The interface complies with the entire I2C-bus specification, and allows turning power off to the LPC2880/LPC2888 without causing a problem with other devices on the same I2C-bus. 6.14.1 Features • Standard I2C-bus interface, configurable as Master, Slave, or Master/Slave. • Arbitration between simultaneously transmitting masters without corruption of serial data on the bus. • Programmable clock allows adjustment of I2C-bus transfer rates. • Bidirectional data transfer between masters and slaves. • Serial clock synchronization allows devices with different bit rates to communicate via one serial bus. • Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer. • Supports normal (100 kHz) and fast (400 kHz) operation. 6.15 10-bit A/D converter The LPC2880/LPC2888 contains a single 10-bit successive approximation analog to digital converter with five multiplexed channels. 6.15.1 Features • 10-bit successive approximation analog to digital converter. • Input multiplexing among 5 pins. |
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