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LPC2888 Scheda tecnica(PDF) 19 Page - NXP Semiconductors

Il numero della parte LPC2888
Spiegazioni elettronici  16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
PDF  34 Pages
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

LPC2888 Scheda tecnica(HTML) 19 Page - NXP Semiconductors

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LPC2880_LPC2888_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 22 June 2006
19 of 34
Philips Semiconductors
LPC2880; LPC2888
16/32-bit ARM microcontrollers with external memory interface
• Optional interrupt via Event Router.
• 32-bit Prescaler and 32-bit Counter allow extended watchdog period.
6.11 Real-time clock
The Real Time Clock (RTC) is a set of counters for measuring time when system power is
on, and optionally when it is off. It uses little power in either mode.
6.11.1 Features
• Measures the passage of time to maintain a calendar and clock.
• Ultra Low Power design to support battery powered systems.
• Provides Seconds, Minutes, Hours, Day of Month, Month, Year, Day of Week, and Day
of Year.
• Dedicated 32 kHz oscillator.
• Dedicated power supply pin can be connected to a battery or to the main 1.8 V.
6.12 General purpose DMA controller
The General Purpose DMA Controller (GPDMA) is an AMBA AHB compliant master
allowing selected LPC2880/LPC2888 peripherals to have DMA support. Peripherals that
can be serviced by the GPDMA channels include the MCI/SD card interface, UART TX
and/or RX, the I2C-bus interface, the Simple Analog Out (SAO) front-ends to the I2S/DAO
and 16-bit dual DACs, the Simple Analog In (SAI) interfaces for data from the I2S/DAI and
16-bit dual ADCs, and the output to the LCD interface.
6.12.1 Features
• Eight DMA channels. Each channel can support a unidirectional transfer, or a pair of
channels can be used together to follow a linked list of buffer addresses and transfer
counts.
The GPDMA provides 16 peripheral DMA request lines. Most of these are connected
to the peripherals listed above; two can be used for external requests.
• The GPDMA supports a subset of the flow control signals supported by ARM DMA
channels, specifically ‘single’ but not ‘burst’ operation.
• Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and
peripheral-to-peripheral transfers.
• Scatter or gather DMA is supported through the use of linked lists. This means that
the source and destination areas do not have to occupy contiguous areas of memory.
• Rotating channel priority. Each DMA channel has equal opportunity to perform
transfers.
• The GPDMA is one of three AHB masters in the LPC2880/LPC2888, the others being
the ARM7 processor and the USB interface.
• Incrementing or non-incrementing addressing for source and destination.
• Supports 8-bit, 16-bit, and 32-bit wide transactions.
• GPDMA channels can be programmed to swap data between big- and little-endian
formats during a transfer.



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