MB95F118MS datasheet(5/64 Pages) FUJITSU

5 / 64 page

MB95110M Series

(Continued)

*1 : For ROM capacity and RAM capacity, refer to “1. Memory space” in “■ CPU CORE”.

*2 : For details of option, refer to “■ MASK OPTION”.

*3 : Specify clock mode when ordering MASK ROM.

*4 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.

Note : Part number of the evaluation device in MB95110M series is MB95FV100D-103. When using it, the MCU

board (MB2146-303A) is required.

MB95117M

MB95F114MS

MB95F116MS

MB95F118MS

MB95F114NS

MB95F116NS

MB95F118NS

MB95F114MW

MB95F116MW

MB95F118MW

MB95F114NW

MB95F116NW

MB95F118NW

LIN-UART

Dedicated reload timer allowing a wide range of communication speeds to be set.

Full duplex double buffer.

Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer

capable.

LIN functions available as the LIN master or LIN slave.

8/10-bit A/D converter

(8 channels)

8-bit or 10-bit resolution can be selected.

8/16-bit compound

timer (2 channels)

Each channel of the timer can be used as “8-bit timer

× 2 channels” or “16-bit timer

× 1 channel”.

Built-in timer function, PWC function, PWM function, capture function, and square

waveform output

Count clock : 7 internal clocks and external clock can be selected

16-bit PPG

PWM mode or one-shot mode can be selected.

Counter operating clock : 8 selectable clock sources

Support for external trigger start

8/16-bit PPG

(2 channels)

Each channel of the PPG can be used as “8-bit PPG

× 2 channels” or “16-bit PPG ×

1 channel”.

Counter operating clock : Eight selectable clock sources

Watch counter

(for dual clock product)

Count clock : 4 selectable clock sources (125 ms, 250 ms, 500 ms, or 1 s)

Counter value can be set from 0 to 63. (Capable of counting for 1minute when

selecting clock source 1 second and setting counter value to 60)

Watch prescaler

(for dual clock product)

4 selectable interval times (125 ms, 250 ms, 500 ms, or 1 s)

External interrupt

(8 channels)

Interrupt by edge detection (rising, falling, or both edges can be selected.)

Can be used to recover from standby modes.

Flash memory

Supports automatic programming, Embedded AlgorithmTM *4

Write/Erase/Erase-Suspend/Resume commands

A flag indicating completion of the algorithm

Number of write/erase cycles (Minimum) : 10000 times

Data retention time : 20 years

Erase can be performed on each block

Block protection with external programming voltage

Flash Security Feature for protecting the content of the Flash

Standby mode

Sleep, stop, watch (for dual clock product) , and timebase timer

Part number

Parameter

MB95F118MS Scheda tecnica(PDF) 5 Page - fujitsu semiconductor

MB95F118MS Scheda tecnica(HTML) 5 Page - fujitsu semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

Scheda tecnica Scarica

Link URL