MB90F482PF datasheet(8/113 Pages) FUJITSU

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MB90480/485 Series

s PIN DESCRIPTIONS

(Continued)

Pin No.

Pin name

Circuit

type

Function

LQFP*1

QFP*2

Oscillator pin

X0A

32 kHz oscillator pin

X1A

32 kHz oscillator pin

RST

Reset input pin

83 to 90 85 to 92

P00 to P07

(CMOS)

This is a general purpose I/O port. A setting in the pull-up resistance

setting register (RDR0) can be used to apply pull-up resistance (RD00-

RD07

= “1”) . (Disabled when pin is set for output.)

AD00 to

AD07

In multiplex mode, these pins function as the external address/data bus

low I/O pins.

D00 to D07

In non-multiplex mode, these pins function as the external data bus low

output pins.

91 to 98

93 to

100

P10 to P17

(CMOS)

This is a general purpose I/O port. A setting in the pull-up resistance

setting resister (RDR1) can be used to apply pull-up resistance (RD10-

RD17

= “1”) . (Disabled when pin is set for output.)

AD08 to

AD15

In multiplex mode, these pins function as the external address/data bus

high I/O pins.

D08 to D15

In non-multiplex mode, these pins function as the external data bus high

output pins.

99,

100,

1,2

1 to 4

P20 to P23

(CMOS/H)

This is a general purpose I/O port. When the bits of external

address output control register (HACR) are set to "1" in external bus

mode, these pins function as general purpose I/O ports.

A16 to A19

When the bits of external address output control register (HACR) are set

to "0" in multiplex mode, these pins function as address high output pins

(A16-A19).

A16 to A19

When the bits of external address output control register (HACR) are set

to "0" in non-multiplex mode, these pins function as address high output

pins (A16-A19).

3 to 6

5 to 8

P24 to P27

(CMOS/H)

This is a general purpose I/O port. When the bits of external address

output control register (HACR) are set to "1" in external bus mode, these

pins function as general purpose I/O ports.

A20 to A23

When the bits of external address output control register (HACR) are set

to "0" in multiplex mode, these pins function as address high output pins

(A20-A23).

A20 to A23

When the bits of external address output control register (HACR) are set

to "0" in non-multiplex mode, these pins function as address high output

pins (A20-A23).

PPG0 to

PPG3

PPG timer output pins.

P30

(CMOS/H)

This is a general purpose I/O port.

A00

In non-multiplex mode, this pin functions as an external address pin.

AIN0

8/16-bit up/down timer input pin (channel 0) .

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