MB90F482PF datasheet(15/113 Pages) FUJITSU

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MB90480/485 Series

s HANDLING DEVICES

Be careful never to exceed maximum rated voltages (preventing latchup)

In CMOS IC devices, a condition known as latchup may occur if voltages higher than VCC or loser than VSS are

applied to input or output pins other than medium-or high-voltage pins, or if the voltage applied between VCC and

VSS exceeds the rated voltage level.

When latchup occurs, the power supply current increases rapidly causing the possibility of thermal damage to

circuit elements. Therefore it is necessary to ensure that maximum ratings are not exceeded in circuit operation.

Similarly, when turning the analog power supply on or off, it is necessary to ensure that the analog power supply

voltages (AVCC and AVRH) and analog input voltages do not exceed the digital power supply (VCC) .

Treatment of unused pins

Leaving unused input pins unconnected can cause abnormal operation or latchup, leading to permanent damage.

Unused input pins should always be pulled up or down through resistance of at least 2 k

Ω. Any unused input/

output pins may be set to output mode and left open, or set to input mode and treated the same as unused input

pins.

Notes on Using External Clock

Even when using an external clock signal, an oscilltion stabilization delay is applied after a power-on reset or

when recovering from sub-clock or stop mode. When using an external clock, 25 MHz should be the upper

frequency limit.

The following figure shows a sample use of external clock signals.

Treatment of Power Supply Pins (VCC/VSS)

When multiple VCC/VSS pins are present, device design considerations for prevention of latch-up and unwanted

electromagnetic interference, abnormal storobe signal operation due to ground level rise, and conformity with

total output current ratings require that all power supply pins must be externally connected to power supply or

ground.

Consideration should be given to connecting power supply sources to the VCC/VSS terminals of this device with

as low impedane as possible. It is also recommended that a bypass capacitor of approximately 0.1

µF be placed

between the VCC and VSS lines as close to this device as possible.

Crystal Oscillator Circuits

Noise around the X0/X1, or X0A/X1A pins may cause this device to operate abnormally. In the interest of stable

operation it is strongly recommended that printed circuit artwork places ground bypass capacitors as close as

possible to the X0/X1, X0A/X1A and crystal oscillator (or ceramic oscillator) and that oscillator lines do not cross

the lines of other circuits.

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