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MB90F482PF Scheda tecnica(PDF) 87 Page - fujitsu semiconductor |
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MB90F482PF Scheda tecnica(HTML) 87 Page - fujitsu semiconductor |
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87 / 113 page ![]() MB90480/485 Series 87 (2) Clock Output Timing (VSS = 0.0 V, TA = −40 °C to +85 °C) * : For tCP see “ (1) Clock Timing Standards.” Parameter Symbol Pin name Conditions Value Unit Remarks Min Max Cycle time tCYC CLK tCP* ns CLK ↑→CLK↓ tCHCL CLK VCC = 3.0 V to 3.6 V tCP* / 2 − 15 tCP* / 2 + 15 ns at fcp = 25 MHz VCC = 2.7 V to 3.3 V tCP* / 2 − 20 tCP* / 2 + 20 ns at fcp = 16 MHz VCC = 2.7 V to 3.3 V tCP* / 2 − 64 tCP* / 2 + 64 ns at fcp = 5 MHz CLK tCYC 2.4 V 2.4 V 0.8 V tCHCL |
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