TPS25751D datasheet(44/89 Pages) TI1

44 / 89 page

to explain the terminology used. The key to the protocol diagrams is in the SMBus Specification and is repeated

here in part.

Unique Address

Byte Count = N

Data Byte 1

Data Byte 2

Data Byte N

Figure 8-30. I2C Unique Address Write Register Protocol

Unique Address

Byte Count = N

Unique Address

Data Byte N

Data Byte 1

Data Byte 2

Figure 8-31. I2C Unique Address Read Register Protocol

Target Address

Data Byte

Start condition

Repeated start condition

Read (bit value of 1)

Write (bit value of 0

Field is required to have the value x

Acknowledge (this bit position may be 0 for an ACK or 1 for a NACK)

Stop condition

Controller-to-target

Target-to-controller

Continuation of protocol

Figure 8-32. I2C Read/Write Protocol Key

8.4 Device Functional Modes

8.4.1 Pin Strapping to Configure Default Behavior

During the boot procedure, the device reads the ADCINx pins and set the configurations based on the table

below. The device then attempts to load a configuration from an external EEPROM on the I2Cc bus. If no

EEPROM is detected, then the device waits for an external host to load a configuration.

When an external EEPROM is used, each device is connected to a unique EEPROM, it cannot be shared for

multiple devices. The external EEPROM is set at 7-bit target address 0x50.

TPS25751

SLVSH93 – OCTOBER 2023

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