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TPS25751D Scheda tecnica(PDF) 81 Page - Texas Instruments |
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TPS25751D Scheda tecnica(HTML) 81 Page - Texas Instruments |
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81 / 89 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 30X (0.4) 30X (0.55) 38X (0.2) (1.56) (1.53) (2.72) 2X (1.075) 4X (0.45) 4X (0.2) (2.925) (3.2) 2X (0.55) (R0.05) TYP 0.05 MIN ALL AROUND 0.05 MAX ALL AROUND ( 0.2) TYP VIA (3.85) 2X (2.65) (2.075) (0.145) (0.965) WQFN - 0.8 mm max height REF0038A PLASTIC QUAD FLATPACK - NO LEAD 4226763/C 11/2021 PKG 1 6 7 19 20 25 26 38 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:18X 39 40 SOLDER MASK OPENING METAL UNDER SOLDER MASK NOTES: (continued) 4. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED PADS 20-25 & 32-35 EXPOSED METAL METAL SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DETAILS NOT TO SCALE DEFINED EXPOSED METAL www.ti.com TPS25751 SLVSH93 – OCTOBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 81 Product Folder Links: TPS25751 |
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