STR750FV2 datasheet(74/81 Pages) STMICROELECTRONICS

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Electrical parameters

STR750Fxx STR751Fxx STR752Fxx STR755Fxx

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General PCB Design Guidelines

To obtain best results, some general design and layout rules should be followed when

designing the application PCB to shield the noise-sensitive, analog physical interface from

noise-generating CMOS logic signals.

●

Use separate digital and analog planes. The analog ground plane should be connected

to the digital ground plane via a single point on the PCB.

●

Filter power to the analog power planes. It is recommended to connect capacitors, with

good high frequency characteristics, between the power and ground lines, placing

0.1 µF and optionally, if needed 10 pF capacitors as close as possible to the STR7

power supply pins and a 1 to 10 µF capacitor close to the power source (see

Figure 43).

●

The analog and digital power supplies should be connected in a star network. Do not

use a resistor, as VDDA_ADC is used as a reference voltage by the A/D converter and

any resistance would cause a voltage drop and a loss of accuracy.

●

Properly place components and route the signal traces on the PCB to shield the analog

inputs. Analog signals paths should run over the analog ground plane and be as short

as possible. Isolate analog signals from digital signals that may switch while the analog

inputs are being sampled by the A/D converter. Do not toggle digital outputs near the

A/D input being converted.

Software Filtering of Spurious Conversion Results

For EMC performance reasons, it is recommended to filter A/D conversion outliers using

software filtering techniques.

Figure 43.

Power supply filtering

VSS

VDD_IO

0.1

µF

VDD

STR75XX

VDDA_ADC

VSSA_ADC

POWER

SUPPLY

SOURCE

STR7

DIGITAL NOISE

FILTERING

EXTERNAL

NOISE

FILTERING

1 to 10

µF

0.1

µF

(3.3V or 5.0V)

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