STR750FV2 datasheet(17/81 Pages) STMICROELECTRONICS

17 / 81 page

STR750Fxx STR751Fxx STR752Fxx STR755Fxx

Pin Description

17/81

7D1

P0.29 / TIM1_TI1

/ ADC_IN8

I/O

XO2

Port 0.29

TIM1: Input

Capture 1

ADC: Analog

input 8

8E1

P0.28 /

TIM1_OC1

I/O

XO2

Port 0.28

TIM1: Output Compare 1

TEST

Reserved, must be tied to ground

VSS_IO

Ground Voltage for digital I/Os

P0.23 /

UART1_RTS /

ADC_IN6

I/O

XO2

Port 0.23

UART1: Ready

To Send

output(4)

ADC analog input

P2.04 /

TIM2_OC1

I/O

XO2

Port 2.04

TIM2: Output

Compare 1(4)

P2.03 /

UART1_RTS

I/O

XO2

Port 2.03

UART1: Ready

To Send

output(4)

P2.02

I/O

XO2

Port 2.02

P0.22 /

UART1_CTS /

ADC_IN5

I/O

XO2

Port 0.22

UART1: Clear To

Send input

ADC: Analog

input 5

P0.21 /

UART1_TX

I/O

XO2

Port 0.21

UART1: Transmit data output

(remappable to P0.15)(4)

P0.20 /

UART1_RX

I/O

XO2

Port 0.20

UART1: Receive data input

(remappable to P0.14)(4)

P1.19 / JTMS

I/O

JTAG mode

selection

input(6)

Port 1.19

P1.18 / JTCK

I/O

JTAG clock

input(6)

Port 1.18

P1.17 / JTDO

I/O

JTAG data

output(6)

Port 1.17

P1.16 / JTDI

I/O

JTAG data

input(6)

Port 1.16

NJTRST

JTAG reset input(5)

P2.01

I/O

XO2

Port 2.01

P2.00

I/O

XO2

Port 2.00

P0.13 / RTCK /

UART0_RTS

UART2_TX

I/O

JTAG

return

clock

output(6)

Port 0.13

UART0: Ready

To Send

output(4)

UART2: Transmit

Data output

(when

remapped)(8)

Table 6.

STR750F pin description (continued)

Pin n°

Pin Name

Input

Output

Main

function

(after

reset)

Alternate function

(3)

STR750FV2 Scheda tecnica(PDF) 17 Page - STMicroelectronics

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