PL460 datasheet(27/48 Pages) MICROCHIP

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PL460

Serial Peripheral Interface (SPI)

Data Sheet

DS60001666D - 27

Figure 8-1. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)

SCK

(CPOL = 0)

SCK

(CPOL = 1)

MOSI

(from

host)

MISO

(from

client)

(to

client)

MSB

LSB

* Not defined.

SCK cycle (for reference)

Figure 8-2. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)

SCK

(CPOL = 0)

SCK

(CPOL = 1)

MOSI

(from

host)

MISO

(from

client)

(to

client)

MSB

LSB

* Not defined.

SCK cycle (for reference)

8.4.2.

SPI Client Mode

When operating in client mode, the SPI processes data bits on the clock provided on the SPI clock

pin (SCK). The SPI waits until CS goes active before receiving the serial clock from an external host.

When CS falls, the clock is validated and the data is loaded.

The bits are shifted out on the MISO line and sampled on the MOSI line.

When a transfer starts, the data shifted out is the data present in the internal Shift register. If no

data has been written, the last data received is transferred. If no data has been received since the

last reset, all bits are transmitted low, as the internal Shift register resets to 0.

When the first data is written, it is transferred immediately to the internal Shift register. If new data

is written, it remains until a transfer occurs, that is, CS falls and there is a valid clock on the SCK

pin. When the transfer occurs, the last data written is transferred to the internal Shift register. This

enables frequent updates of critical variables with single transfers.

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